PIC16F877ATISLASHML datasheet(48/234 Pages) MICROCHIP

48 / 234 page

PIC16F87XA

DS39582B-page 46

 2003 Microchip Technology Inc.

4.3

PORTC and the TRISC Register

PORTC is an 8-bit wide, bidirectional port. The corre-

sponding data direction register is TRISC. Setting a

TRISC bit (= 1) will make the corresponding PORTC

pin an input (i.e., put the corresponding output driver in

a High-Impedance mode). Clearing a TRISC bit (= 0)

will make the corresponding PORTC pin an output (i.e.,

put the contents of the output latch on the selected pin).

PORTC is multiplexed with several peripheral functions

(Table 4-5). PORTC pins have Schmitt Trigger input

buffers.

When the I2C module is enabled, the PORTC<4:3>

pins can be configured with normal I2C levels, or with

SMBus levels, by using the CKE bit (SSPSTAT<6>).

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an

output, while other peripherals override the TRIS bit to

make a pin an input. Since the TRIS bit override is in

effect while the peripheral is enabled, read-modify-

write instructions (BSF, BCF, XORWF) with TRISC as the

destination, should be avoided. The user should refer

to the corresponding peripheral section for the correct

TRIS bit settings.

FIGURE 4-6:

PORTC BLOCK DIAGRAM

(PERIPHERAL OUTPUT

OVERRIDE) RC<2:0>,

RC<7:5>

FIGURE 4-7:

PORTC BLOCK DIAGRAM

(PERIPHERAL OUTPUT

OVERRIDE) RC<4:3>

Port/Peripheral Select(2)

Data Bus

WR Port

WR TRIS

Data Latch

TRIS Latch

Schmitt

Trigger

Peripheral Data Out

VDD

VSS

RD Port

Peripheral

OE(3)

Peripheral Input

I/O

pin(1)

Note 1: I/O pins have diode protection to VDD and VSS.

2: Port/Peripheral Select signal selects between port

data and peripheral output.

3: Peripheral OE (Output Enable) is only activated if

Peripheral Select is active.

RD TRIS

Port/Peripheral Select(2)

Data Bus

WR Port

WR TRIS

Data Latch

TRIS Latch

Schmitt

Trigger

Peripheral Data Out

VDD

VSS

RD Port

Peripheral

OE(3)

SSP Input

I/O

pin(1)

Note 1: I/O pins have diode protection to VDD and VSS.

2: Port/Peripheral Select signal selects between port data

and peripheral output.

3: Peripheral OE (Output Enable) is only activated if

Peripheral Select is active.

CKE

SSPSTAT<6>

Schmitt

Trigger

with

SMBus

Levels

RD TRIS

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