COP888EB datasheet(2/75 Pages) NSC

2 / 75 page

Basic Functional Description

n CAN I/F — CAN serial bus interface block as described

in the CAN specification part 2.0B (Passive)

— Interface rates up to 250k bit/s are supported utilizing

standard message identifiers

n Programmable double buffered USART

n A/D — 8-bit, 8 channel, 1-LSB Resolution, with improved

Source Impedance and improved channel to channel

cross talk immunity

n Multi-Input-Wake-Up (MIWU) — edge selectable wake-up

and interrupt capability via input port and CAN interface

(Port L, Port M and CAN I/F); supports Wake-Up

capability on SPI, USART, and T2 capture

n Port C — 8-bit bi-directional I/O port

n Port D — 8-bit Output port with high current drive

capability (10 mA)

n Port F — 8-bit bidirectional I/O

n Port G — 8-bit bidirectional I/O port, including alternate

functions for:

— MICROWIRE™ Input and Output

— Timer 1 Input or Output (Depending on mode

selected)

— External Interrupt input

— WATCHDOG Output

n Port I — 8-bit input port combining either digital input, or

up to eight A/D input channels

n Port L — 8-bit bidirectional I/O port, including alternate

functions for:

— USART Transmit/Receive I/O

— Multi-input-wake up (MIWU on all pins)

n Port M — 8-bit I/O port, with the following alternate

function

— SPI Interface

— MIWU

— CAN Interface Wake-up (MSB)

— Timer 2 Input or Output (Depending on mode

selected)

n Port N — 8-bit bidirectional I/O

— SPI Slave Select Expander

n Two 16-bit multi-function Timer counters (T1 and T2)

plus supporting registers

— (I/P Capture, PWM and Event Counting)

n Idle timer — Provides a basic time-base counter, (with

interrupt) and automatic wake up from IDLE mode

programmable

n MICROWIRE/PLUS — MICROWIRE serial peripheral

interface, supporting both Master and Slave operation

n HALT and IDLE — Software programmable low current

modes

— HALT — Processor stopped, Minimum current

— IDLE — Processor semi-active more than 60% power

saving

n 8 kBytes ROM and 192 bytes of on board static RAM

n SPI Master/Slave interface includes 12 bytes Transmit

and 12 bytes Receive FIFO Buffers. Operates up to 1M

Bit/S

n On board programmable WATCHDOG and CLOCK

Monitor

Applications

n Automobile Body Control and Comfort System

n Integrated Driver Informaiton Systems

n Steering Wheel Control

n Car Radio Control Panel

n Sensor/Actuator Applications in Automotive and

Industrial Control

Block Diagram

DS012837-1

FIGURE 1. Block Diagram

COP888EB 数据表(PDF) 2 Page - National Semiconductor (TI)

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