Detailed Specifications

STV0674

14/35

Note: 1 The SDRAM interface is designed to operate with SDRAM devices which are compliant with the

Intel SDRAM Specification Revision 1.7 November 1999. Speed grades 66, 100 and 133MHz are

compatible.

2 Above timing assumes 20pF load per pad.

Figure 4: SDRAM write timing

Table 2: SDRAM timing

Symbol

Min

Typ.

Max

Units

Symbol

Min

Typ.

Max

Units

41.67

ns

20.12

ns

20.11

20.83

21.55

21.82

ns

20.11

20.83

21.55

24.76

ns

0ns

20.27

ns

20.02

ns

20.67

ns

19.79

ns

DCLK

Command

DQM

A0-9,BA

A10

ACTIVE

WRITE

NOP

PRECHARGE

NOP

ROW

COLUMN

ROW

DIN M

DIN M + 1

DIN M + 2

DIN M + 3

DQ

CKE