Pinout and Pin Description

STV0674

30/35

5.2.1

Power on/ low power default pin states

The initial state of SFP pins varies depending on the power on state of the NAND flash / SMC detect

pin, SDRAM detect pin and package detect pin. The default pin states are detailed in

a. SFP 0-22 default to inputs on reset and in low power states. SFP 0-22 should therefore not be left

floating and must be configured by external circuit. See

b. Pull Up required. See

c. SFP 3> Pull Up if NAND or SMC present /Down if not, See

d. SFP 9> Pull down required if pin not used, must be held low at power on.

e. SFP 14> Pull down required for power latching otherwise pull up required.

f. SFP 16> Pull Up required, if SMC present. (SFP 3 must also be pulled up)

g. SFP 38> Pull resistor required if NAND present, value 10k

Ω.

h. SFP 60> Pull Up if SDRAM present /Down if not, See

Section 5.2.1

Table 11: Power-on/low-power default pin states

Pin state at power on

Initial state

TQFP_SEL

CS_NAND

CS_SDRAM

Flash Port

Non-Flash

SDRAM

GPIO

SFP0

SFP3

SFP60

SFP 25-32,

35-39

SFP 23, 24, 33,

34, 40-60

SFP0-22

0X

X

Reserved

1

1

0

Ouput

Input

Input

1

X

1

Output

Output

Input

1

0

0

Input

Input

Input