REV. B

AD1981B

–21–

BCA[5,0]

Biquad and Coefficient Address Pointer

biquad 0 coef a0 BCA[5,0] = 011011

biquad 0 coef a1 BCA[5,0] = 011010

biquad 0 coef a2 BCA[5,0] = 011001

biquad 0 coef b1 BCA[5,0] = 011101

biquad 0 coef b2 BCA[5,0] = 011100

biquad 1 coef a0 BCA[5,0] = 100000

biquad 1 coef a1 BCA[5,0] = 011111

biquad 1 coef a2 BCA[5,0] = 011110

biquad 1 coef b1 BCA[5,0] = 100010

biquad 1 coef b2 BCA[5,0] = 100001

biquad 2 coef a0 BCA[5,0] = 100101

biquad 2 coef a1 BCA[5,0] = 100100

biquad 2 coef a2 BCA[5,0] = 100011

biquad 2 coef b1 BCA[5,0] = 100111

biquad 2 coef b2 BCA[5,0] = 100110

biquad 3 coef a0 BCA[5,0] = 101010

biquad 3 coef a1 BCA[5,0] = 101001

biquad 3 coef a2 BCA[5,0] = 101000

biquad 3 coef b1 BCA[5,0] = 101100

biquad 3 coef b2 BCA[5,0] = 101011

biquad 4 coef a0 BCA[5,0] = 101111

biquad 4 coef a1 BCA[5,0] = 101110

biquad 4 coef a2 BCA[5,0] = 101101

biquad 4 coef b1 BCA[5,0] = 110001

biquad 4 coef b2 BCA[5,0] = 110000

biquad 5 coef a0 BCA[5,0] = 110100

biquad 5 coef a1 BCA[5,0] = 110011

biquad 5 coef a2 BCA[5,0] = 110010

biquad 5 coef b1 BCA[5,0] = 110110

biquad 5 coef b2 BCA[5,0] = 110101

biquad 6 coef a0 BCA[5,0] = 111001

biquad 6 coef a1 BCA[5,0] = 111000

biquad 6 coef a2 BCA[5,0] = 110111

biquad 6 coef b1 BCA[5,0] = 111011

biquad 6 coef b2 BCA[5,0] = 111010

CHS

Channel Select.

CHS = 0 selects left channel coefficients data block.

CHS = 1 selects right channel coefficients data block.

SYM

Symmetry. When set to 1, this bit indicates that the left and right channel coefficients are equal. This shortens

the coefficients’ setup sequence since only the left channel coefficients need to be addressed and set up (the right chan-

nel coefficients are fetched from the left channel memory).

MAD

Mixer ADC Loopback Enable. Enables mixer ADC data to be summed into PCM stream.

LBEN

0 = No loopback allowed (default).

1 = Enable loopback.

EQM

Equalizer Mute. When set to 1, this bit disables the equalizer function (allows all data to pass through). The

reset default sets this bit to 1, disabling the equalizer function until the biquad coefficients can be properly set.

EQ Control Register (Index 60h)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

60h

EQ CTRL

EQM

MAD

X

X

X

X

X

X

SYM

CHS

BCA5

BCA4

BCA3

BCA2 BCA1

BCA0 8080h

LBEN

Register 60h is a read/write register that controls the equalizer functionality and data setup. This register also contains the Biquad and Coefficient Address pointer,

which is used in conjunction with the EQ Data Register (78h) to set up the equalizer coefficients. The reset default disables the equalizer function until the coefficients

can be properly set up by the software and sets the Symmetry bit to allow equal coefficients for left and right channels. All registers not shown and bits containing an X

are assumed to be reserved.