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CC1050-RTR1 数据表(PDF) 17 Page - Texas Instruments |
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CC1050-RTR1 数据表(HTML) 17 Page - Texas Instruments |
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17 / 40 page  CC1050 SWRS044 Page 17 of 40 Frequency programming The operation frequency is set by programming the frequency word in the configuration registers. There are two frequency words registers, termed A and B, which can be programmed to two different frequencies in order to switch fast between two different channels. Frequency word A or B is selected by the F_REG bit in the MAIN register. The frequency word is 24 bits (3 bytes) located in FREQ_2A:FREQ_1A:FREQ_0A and FREQ_2B:FREQ_1B:FREQ_0B for the A and B word respectively. The FSK frequency separation is programmed in the FSEP1:FSEP0 registers (11 bits). The frequency word FREQ is calculated by: 16384 8192 + ⋅ = FREQ f f ref VCO where the reference frequency is the crystal oscillator clock divided by REFDIV (4 bits in the PLL register), a number between 2 and 15: REFDIV f f xosc ref = The equation above gives the VCO frequency, that is, fVCO is the f0 frequency for transmit mode (lower FSK frequency). The upper FSK frequency is given by: f1 = f0 + fsep where fsep is set by the separation word: 16384 FSEP f f ref sep ⋅ = VCO Only one external inductor (L1) is required for the VCO. The inductor will determine the operating frequency range of the circuit. It is important to place the inductor as close to the pins as possible in order to reduce stray inductance. It is recommended to use a high Q, low tolerance inductor for best performance. Typical tuning range for the integrated varactor is 20-25%. Component values for various frequencies are given in Table 1. Component values for other frequencies can be found using the SmartRF ® Studio software. VCO and PLL self-calibration To compensate for supply voltage, temperature and process variations the VCO and PLL must be calibrated. The calibration is done automatically and sets maximum VCO tuning range and optimum charge pump current for PLL stability. After setting up the device at the operating frequency, the self-calibration can be initiated by setting the CAL_START bit. The calibration result is stored internally in the chip, and is valid as long as power is not turned off. If large supply voltage variations (more than 0.5 V) or temperature variations (more than 40 degrees) occur after calibration, a new calibration should be performed. The self-calibration is controlled through the CAL register (see configuration registers description p. 30). The CAL_COMPLETE bit indicates complete calibration. The user can poll this bit, or simply wait for 26 ms (calibration wait time when CAL_WAIT = 1). The wait time is proportional to the internal PLL reference frequency. The lowest permitted reference frequency (1 MHz) gives 26 ms wait time, which is therefore the worst case. Reference frequency [MHz] Calibration time [ms] 2.4 11 2.0 13 1.5 18 1.0 26 Not Recommended for New Designs |
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