CC2400-RTR1 datasheet(72/84 Pages) TI1

72 / 84 page

CC2400

SWRS042A

Page 72 of 83

MANFIDL (0x1E) - Manufacturer ID, Lower 16 Bit

Bit

Field Name

Reset

R/W

Description

15:12

PARTNUM[3:0]

The device part number.

CC2400 has part number 0x001.

11:0

MANFID[11:0]

0X33D

Gives the JEDEC manufacturer ID. The actual manufacturer ID

can be found in MANIFID[7:1], the number of continuation

bytes in MANFID[11:8] and MANFID[0]=1.

Chipcon's JEDEC manufacturer ID is 0x7F 0x7F 0x7F 0x9E

(0x9E preceded by three continuation bytes.)

MANFIDH (0x1F) - Manufacturer ID, Upper 16 Bit

Bit

Field Name

Reset

R/W

Description

15:12

VERSION[3:0]

Chip version number.

11:0

PARTNUM[15:4]

The device part number.

CC2400 has part number 0x001.

GRMDM (0x20) - Generic Radio Modem Control and Status

Bit

Field Name

Reset

R/W

Description

Reserved, write as 0.

14:13

SYNC_ERRBITS_ALLOWED

[1:0]

R/W

Sync word detection occurs when the number of bits in the sync

word correlator different from that specified by the SYNC

registers is equal to or lower than SYNC_ERRBITS_ALLOWED.

12:11

PIN_MODE[1:0]

R/W

Selects between un-buffered mode, buffered mode or test mode.

The pin configuration is set according to Table 15.

0: Un-buffered mode

1: Buffered mode

2: HSSD test mode

3: Unused

PACKET_MODE

R/W

When this bit is set the packet mode is enabled. The pin

configuration is set according to Table 15.

In TX, this enables preamble generation, sync word, and CRC

appending (if enabled by CRC_ON) in the buffered mode.

In RX, this enables sync word detection in buffered

and un-

buffered modes, and CRC verification (if enabled by CRC_ON) in

buffered mode.

9:7

PRE_BYTES[2:0]

R/W

The number of preamble bytes ("01010101") to be sent in packet

mode:

000: 0

001: 1

010: 2

011: 4

100: 8

101: 16

110: 32

111: Infinitely on

6:5

SYNC_WORD_SIZE[1:0]

R/W

The size of the packet mode sync word sent in TX and correlated

against in RX:

00: The 8 MSB bits of SYNC_WORD.

01: The 16 MSB bits of SYNC_WORD.

10: The 24 MSB bits of SYNC_WORD.

11: The 32 MSB bits of SYNC_WORD.

CRC_ON

R/W

In packet mode a CRC is calculated and is transmitted after the

data in TX, and a CRC is calculated during reception in RX.

CC2400-RTR1 数据表(PDF) 72 Page - Texas Instruments

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