DAC5686IPZP datasheet(39/53 Pages) TI1

39 / 53 page

DAC5686

www.ti.com ............................................................................................................................................................ SLWS147F – APRIL 2003 – REVISED JUNE 2009

freq_int[23:16]: The upper mid 8 bits of the frequency register in the DDS block

MSB

LSB

freq_int[31:24]

freq_int[31:24]: The most significant 8 bits of the frequency register in the DDS block

MSB

LSB

phase_int[7:0]

phase_int[7:0]: The lower 8 bits of the phase register in the DDS block

MSB

LSB

phase_int[15:8]

phase_int[15:8]: The most significant 8 bits of the phase register in the DDS block

MSB

LSB

mode[1:0]

div[1:0]

sel[1:0]

counter

Full_bypass

mode[1:0]: Controls the mode of the DAC5686; summarized in Table 6.

Table 6. DAC5686 Modes

mode[1:0]

DAC5686 MODE

Dual-DAC

Single-sideband

Quadrature

Dual-DAC

div[1:0]: Controls the PLL divider value; summarized in Table 7.

Table 7. PLL Divide Ratios

div[1:0]

PLL DIVIDE RATIO

1× divider

2× divider

4× divider

8× divider

Submit Documentation Feedback

Product Folder Link(s): DAC5686

DAC5686IPZP 数据表(PDF) 39 Page - Texas Instruments

DAC5686IPZP 数据表(HTML) 39 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

数据表下载