bq78350-R1

SLUSCD0 – AUGUST 2015

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12 Layout

12.1 Layout Guidelines

12.1.1 Power Supply Decoupling Capacitor

Power supply decoupling from VCC to ground is important for optimal operation of the bq78350-R1. To keep the

loop area small, place this capacitor next to the IC and use the shortest possible traces. A large-loop area

renders the capacitor useless and forms a small-loop antenna for noise pickup.

Ideally, the traces on each side of the capacitor must be the same length and run in the same direction to avoid

differential noise during ESD. If possible, place a via near the VSS pin to a ground plane layer.

Placement of the RBI capacitor is not as critical. It can be placed further away from the IC.

12.1.2 MRST Connection

The MRST pin controls the gas gauge reset state. The connections to this pin must be as short as possible in

order to avoid any incoming noise. Direct connection to VCC is possible if the reset functionality is not desired or

necessary.

If unwanted resets are found, one or more of the following solutions may be effective:

•

Add a 0.1-

μF capacitor between MRST and ground.

•

Provide a 1-k

Ω pull up resistor to VCC at MRST.

•

Surround the entire circuit with a ground pattern.

If a test point is added at MRST, it must be provided with a 10-k

Ω series resistor.

12.1.3 Communication Line Protection Components

The 5.6-V Zener diodes, which protect the bq78350-R1 communication pins from ESD, must be located as close

as possible to the pack connector. The grounded end of these Zener diodes must be returned to the PACK(–)

node, rather than to the low-current digital ground system. This way, ESD is diverted away from the sensitive

electronics as much as possible.

12.1.4 ESD Spark Gap

Protect the SMBus clock, data, and other communication lines from ESD with a spark gap at the connector. The

following pattern is recommended, with 0.2-mm spacing between the points.

Figure 15. Recommended Spark-Gap Pattern Helps Protect Communication Lines From ESD

24

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