Connection Diagrams

Dual-In-Line

TLF9981 – 5

Top View

Order Number DP8573AN

See NS Package Number N24C

Plastic Chip Carrier

TLF9981 – 6

Top View

Order Number DP8573AV

See NS Package Number V28A

Functional Description

The DP8573A contains a fast access real time clock inter-

rupt control logic and power fail detect logic All functions of

the RTC are controlled by a set of seven registers A simpli-

fied block diagram that shows the major functional blocks is

given in

Figure 1

The blocks are described in the following sections

1 Real Time Clock

2 Oscillator Prescaler

3 Interrupt Logic

4 Power Failure Logic

5 Additional Supply Management

The memory map of the RTC is shown in the memory ad-

dressing table

(Figure 2) A control bit in the Main Status

Register is used to select either control register block

the power fail circuitry to function correctly whenever power

maximum of 1 MX The user should be aware that the con-

trol registers will contain random data The user should en-

sure that the RTC is not in test mode (see register descrip-

tions)

REAL TIME CLOCK FUNCTIONAL DESCRIPTION

As shown in

Figure 2 the clock has 8 bytes of counters

which count from 1100 of a second to years Each counter

counts in BCD and is synchronously clocked The count se-

quence of the individual byte counters within the clock is

shown later in Table VII Note that the day of week day of

month and month counters all roll over to 1 The hours

counter in 12 hour mode rolls over to 1 and the AMPM bit

The AMPM bit is bit D7 in the hours counter

All other counters roll over to 0 Upon initial application of

power the counters will contain random information

TLF9981 – 7

FIGURE 2 DP8573A Internal Memory Map

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