HV310

Features

PWRGD = Active Low

-10V to -90V input voltage range

Few external components

0.33mA typical standby supply current

Programmable over/under voltage limits with

hysteresis

Programmable current limit

Active control during all phases of start-up

Programmable timing

8-Lead SOIC package

Applications

Central office switching

Servers

POTS line cards

ISDN line cards

xDSL line cards

PBX Systems

Powered Ethernet for VoIP

Distributed power systems

Negative power supply control

Antenna and fixed wireless systems

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General Description

The Supertex HV310, Hotswap Controller, Negative Supply controls the power

supply connection during insertion of cards or modules into live backplanes.

It may be used in traditional ‘negative 48V’ powered systems or for higher

voltage busses up to negative 90V.

Operation during the initial power up prevents turn-on glitches, and after

complete charging of load capacitors (typically found in filters at the input

of DC-DC converters) the HV310 issues a power good signal. This signal is

typically used to enable the DC-DC converter. Once a PWRGD signal has

been established, the device sleeps in a low power state, important for large

systems with many individual hotswap cards or modules.

An external power MOSFET is required as the pass element, plus a ramp

capacitor, and resistors to establish current limiting and over and under voltage

lockouts. There is no need for additional external snubber components.

Features are programmable over voltage and under voltage detection of the

input voltage which locks out the load connection if the bus (input) voltage

is out of range. An internal voltage regulator creates a stable reference,

and maintains accurate gate drive voltage. The unique control loop scheme

provides full current control and limiting during start up.

Theory of Operation

Initially the external N-channel MOSFET is held off by the gate signal,

preventing an input glitch. After a delay (while internal circuits are activated)

the inrush current to the load is limited by the gate control output. The current

may ramp up and limit at a maximum value programmed by an external

resistor. Initial time delay, to allow for contact bounce, and charging operation

is determined by the single external ramp capacitor connected to the RAMP

pin. When the load capacitor is fully charged, the controller emerges from

current limit mode, an additional time delay occurs before the external N-

channel MOSFET pass transistor is switched to full conduction, and the

PWRGD output signal is activated. The controller will then transition to a low

power standby mode.

Typical Application Circuit

Hotswap, Inrush Current Limiter Controllers

(Negative Supply Rail)

VDD

UV

OV

VEE

SENSE GATE

-48V

R4

50mΩ

R1

487kΩ

R2

6.81kΩ

R3

9.76kΩ

Q1

IRF530

C

LOAD

+5V

HV310

8

3

2

4

7

COM

DC/DC

PWM

CONVERTER

1

GND

PWRGD

ENABLE

5

RAMP

6

C1

10nF

GND

Long Pin

Short Pin

Jumper

Long Pin

NOTES: 1. Undervoltage Shutdown (UV) set to 35V.

2. Overvoltage Shutdown (OV) set to 65V.

3. Remove jumper if short pin is used.