CY7C68310
Document 38-08030 Rev. *H
Page 6 of 34
4.3.7
DRVPWRVLD
DRVPWRVLD can be used with removable devices (such as
compact flash) to indicate that the media device is present. Pin
polarity and function enable are controlled by bits 4 and 2,
respectively, of EEPROM address 0x0B. When DRVPWRVLD
is deasserted, the CY7C68310 will remove the pull-up on D+
(causing the CY7C68310 to drop off the USB), suspend all
ATA state machine activity, drive all ATA interface signals to ‘0’
(assuming ATAEN = ‘1’), and enter into a low-power state. The
CY7C68310 will remain in this state until DRVPWRVLD is
asserted, at which time it will enable the D+ pull-up, allow
resume of ATA state machine activity, and begin to drive the
ATA interface pins (assuming ATAEN = ‘1’).
4.3.8
ATAEN
The ATAEN pin allows ATA bus sharing with other host
devices. Deasserting ATAEN causes the CY7C68310 to high-
Z all ATA bus interface pins and suspend ATA state machine
activity, otherwise leaving the CY7C68310 operational (USB
operation
continues).
Asserting
ATAEN
causes
the
CY7C68310 to reset the drive and resume normal operation.
To disable USB operation and the ATA interface, the
DRVPWRVLD signal can be used in conjunction with ATAEN
to force the CY7C68310 into a low-power state until normal
operation is resumed. Note that disabling the ATA bus with the
ATAEN pin during the middle of a data transfer will result in
Table 4-2. USB Interrupt Pipe Data Bitmap
USB Interrupt Data Byte 1
USB Interrupt Data Byte 0
76
54
321
07
654
32
10
Figure 4-2. SYSIRQ Latching Algorithm
USB Interrupt
Pipe Polled?
Yes
No
NAK Request
SYSIRQ=1?
Latch State of IO Pins
Set Int_Data = 1
Int_Data = 1?
No
Return Interrupt Data
Set Int_Data = 0
Yes
Yes
No
Yes
Int_Data = 0
and
SYSIRQ=0?
No
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