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PC87365 数据表(PDF) 18 Page - National Semiconductor (TI) |
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PC87365 数据表(HTML) 18 Page - National Semiconductor (TI) |
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18 / 215 page  1.0 Signal/Pin Connection and Description (Continued) 18 www.national.com PSONPOL 109 Strap Configuration 1.4.13 INSTRP 12.2.4 MUX PWBTIN 35 System Wake-Up 1.4.15 INTS 12.2.6 MUX PWBTOUT 33 System Wake-Up 1.4.15 OD12 12.2.9 MUX PWUREQ 32 System Wake-Up 1.4.15 OD6 12.2.9 RDATA 62 FDC 1.4.5 INT 12.2.5 RI1 102 Serial Port 1 1.4.12 INTS 12.2.6 RI2 110 Serial Port 2 1.4.12 INTS 12.2.6 RING 27 System Wake-Up 1.4.15 INTS 12.2.6 MUX RTS1 98 Serial Port 1 1.4.12 O3/6 12.2.8 MUX RTS2 106 Serial Port 2 1.4.12 O3/6 12.2.8 SCL 54 ACB 1.4.1 INT,OD6,O3/6 12.2.5, 12.2.9, 12.2.8 MUX SDA 55 ACB 1.4.1 INT,OD6,O3/6 12.2.5, 12.2.9, 12.2.8 MUX SERIRQ 12 Bus Interface 1.4.2 INPCI,OPCI 12.2.2, 12.2.7 SIN1 97 Serial Port 1 1.4.12 INTS 12.2.6 SIN2 105 Serial Port 2 1.4.12 INTS 12.2.6 SLCT 76 Parallel Port 1.4.9 INT 12.2.5 SLIN_ASTRB 87 Parallel Port 1.4.9 OD14,O14/14 12.2.9, 12.2.8 MM SLPS3,5 36,37 System Wake-Up 1.4.15 INTS 12.2.6 MUX (SLPS3) SMI 21 Bus Interface 1.4.2 OD12 12.2.9 MUX SOUT1 99 Serial Port 1 1.4.12 O3/6 12.2.8 MUX SOUT2 107 Serial Port 2 1.4.12 O3/6 12.2.8 MUX STEP 67 FDC 1.4.5 OD12,O2/12 12.2.9, 12.2.8 STB_WRITE 94 Parallel Port 1.4.9 OD14,O14/14 12.2.9, 12.2.8 MM TEST 98 Strap Configuration 1.4.13 INSTRP 12.2.4 MUX TRK0 64 FDC 1.4.5 INT 12.2.5 VBAT 30 Power and Ground 1.4.10 INULR N/A VDD 20, 52, 83, 115 Power and Ground 1.4.10 PWR N/A VREF 46 Hardware Monitoring 1.4.14 INAN2, OAN1 12.2.11, 12.2.13 VSB 31 Power and Ground 1.4.10 PWR N/A VSS 19, 51, 84, 116 Power and Ground 1.4.10 GND N/A WAIT See BUSY_WAIT WDATA 66 FDC 1.4.5 OD12,O2/12 12.2.9, 12.2.8 WDO 56 WATCHDOG 1.4.16 OD6,O3/6 12.2.9, 12.2.8 MUX WGATE 65 FDC 1.4.5 OD12,O2/12 12.2.9, 12.2.8 WP 63 FDC 1.4.5 INT 12.2.5 WRITE See STB_WRITE XLOCK 53 Protection 1.4.11 INT 12.2.5 MUX Signal Pin(s) Functional Group DC Characteristics MUX Name Section Buffer Type Section |
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