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TSC2000IPW 数据表(PDF) 17 Page - Texas Instruments |
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TSC2000IPW 数据表(HTML) 17 Page - Texas Instruments |
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17 / 34 page ![]() 17 www.ti.com TSC2000 SBAS257 DL1 DL0 DELAY TIME 00 0 µs 0 1 100 µs 1 0 500 µs 1 1 1000 µs TABLE XVII. Reference Power-Up Delay Settings. PDN VALUE DESCRIPTION 0 Internal Reference is Powered at All Times 1 Internal Reference is Powered Down Between Conversions TABLE XVIII. PDN Bit Operation. INT PDN REFERENCE BEHAVIOR 0 0 External Reference Used, Internal Reference Powered Down 0 1 External Reference Used, Interenal Reference Powered Down 1 0 Internal Reference Used, Always Powered Up 1 1 Internal Reference Used, Will Power Up During Conversions and Then Power Down TABLE XIX. Reference Behavior Possibilities. MSB LSB BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 X X X X X X X X X X PRE2 PRE1 PRE0 SNS2 SNS1 SNS0 TABLE XXI. Configuration Control Register. PRE[2:0] PRE2 PRE1 PRE0 TIME 00 0 20 µs 00 1 84 µs 0 1 0 276 µs 0 1 1 340 µs 1 0 0 1.044ms 1 0 1 1.108ms 1 1 0 1.300ms 1 1 1 1.364ms TABLE XXII. Precharge Times. SNS[2:0] SNS2 SNS1 SNS0 TIME 00 0 32 µs 00 1 96 µs 0 1 0 544 µs 0 1 1 608 µs 1 0 0 2.080ms 1 0 1 2.144ms 1 1 0 2.592ms 1 1 1 2.656ms TABLE XXIII. Sense Times. RFV VALUE DESCRIPTION 0 1.25V Reference Voltage 1 2.5V Reference Voltage TABLE XX. RFV Bit Operation. Bit 1: PDN = Reference Power Down. If a 1 is written to this bit, the internal reference will be powered down between conversions. If this bit is a zero, the internal reference will be powered at all times. The default state is to power down the internal reference, so this bit will be a 1. This bit is the same whether reading or writing. Note that the PDN bit, in concert with the INT bit, creates a few possibilities for reference behavior. These are detailed in Table XIX. Bit 0: RFV = Reference Voltage control. This bit selects the internal reference voltage, either 1.25V or 2.5V. The default value is 1.25V. This bit is the same whether reading or writing. TSC2000 CONFIGURATION CONTROL REGISTER (PAGE 1, ADDRESS 05H) This control register controls the configuration of the precharge and sense times for the touch detect circuit. The register is formatted as shown in Table XXI. Bits [5:3]: PRE[2:0] = Precharge Time Selection Bits. These bits set the amount of time allowed for precharging any pin capacitance on the touch screen prior to sensing if a screen touch is happening. Bits [2:0]: SNS[2:0] = Sense Time Selection Bits. These bits set the amount of time the TSC2000 will wait to sense a screen touch between coordinate axis conversions in PENIRQ-controlled mode. |
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