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ADE3000T 数据表(PDF) 38 Page - STMicroelectronics |
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ADE3000T 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 88 page ![]() Sync Measurement Block ADE3XXX 38/88 SMEAS_H_PER_V_L 0x014C R [7:0] 0x0 Horizontal events per vertical event SMEAS_H_PER_V_H 0x014D R [7:0] 0x0 SMEAS_SK_V_HI_L 0x014E R [7:0] 0x0 Vertical high time in XCLKs - 1 SMEAS_SK_V_HI_M 0x014F R [7:0] 0x0 SMEAS_SK_V_HI_H 0x0150 R [7:0] 0x0 SMEAS_TIMEOUT_STATUS 0x0151 [7:2] 0x0 Reserved R [1] 0x0 Indicates that the horizontal measurement timed out. R [0] 0x0 Indicates that the vertical measurement timed out. SMEAS_STATUS_RANGE 0x0152 R [7] 0x0 In Free-running mode any of the status bits can change at the end of each measurement. In One-shot mode any of the status bits can change at the completion of the measurement. The meas_sticky_status bit is a bitwise OR of bits[3:0] (before the bitwise OR, the mask in SMEAS_STATUS_MASK is AND in) and is sticky. The only way to reset it is for software to write a zero into this bit. This bit goes to the scaler to blank the scaler output. A write to this reg will reset it to 0. R [6] 0x0 Indicates that one of the measured polarities does not match the reference value. R [5] 0x0 Hsync (selected by SMEAS_H_SEL) polarity. 0: active low 1: active high R [4] 0x0 Vsync (selected by SMEAS_V_SEL) polarity. 0: active low 1: active high R [3] 0x0 Indicates that the vertical pulse width measurement exceeded the reference +/- tolerance range. R [2] 0x0 Indicates that the horizontal per vertical measurement exceeded the reference +/- tolerance range. R [1] 0x0 Indicates that the XCLKs per horizontal measurement exceeded the reference +/- tolerance range. R [0] 0x0 Indicates that the XCLKs per vertical measurement exceeded the reference +/- tolerance range. SMEAS_MEAS_POLLING 0x0153 [7:2] 0x0 Reserved R [1] 0x0 Toggle on h meas Free-running mode, at end of each meas. No function on one-shot mode. R [0] 0x0 Toggle on v meas Free-running mode, at end of each meas. No function on one-shot mode. Table 13: Sync Measurement Registers (Sheet 7 of 8) Register Name Addr Mode Bits Default Description |
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