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ADE3000SXT 数据表(PDF) 37 Page - STMicroelectronics |
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ADE3000SXT 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 88 page  37/88 ADE3XXX Sync Measurement Block SMEAS_ANA_ACT 0x0140 [7:5] 0x0 Reserved R [4] 0x0 Composite sync is active R [3] 0x0 Vsync from SOG separator is active R [2] 0x0 Comp vsync from composite sync separator is active R [1] 0x0 Analog hsync is active R [0] 0x0 Analog vsync is active SMEAS_DVI_ACT 0x0141 [7:2] 0x0 Reserved R [1] 0x0 DVI enable is active R [0] 0x0 DVI clk / 1K is active SMEAS_YUV_ACT 0x0142 [7:5] 0x0 Reserved R [4] 0x0 TCON vsync is active. R [3] 0x0 TCON hsync is active. R [2] 0x0 TCON enable is active. R [1] 0x0 YUV enable is active. R [0] 0x0 YUV clk / 1K is active. SMEAS_ANA_STUCK 0x0143 [7:5] 0x0 Reserved R [4] 0x0 Comp sync is stuck at 1(high)/0(low) R [3] 0x0 Vsync from SOG separator is stuck at 1(high)/0(low) R [2] 0x0 Comp vsync from separator is stuck at 1(high)/0(low) R [1] 0x0 Analog hsync is stuck at 1(high)/0(low) R [0] 0x0 Analog vsync is stuck at 1(high)/0(low) SMEAS_DVI_STUCK 0x0144 [7:2] 0x0 Reserved R [1] 0x0 DVI data enable is stuck at 1(high)/0(low) R [0] 0x0 DVI clk / 1K is stuck at 1(high)/0(low) SMEAS_YUV_STUCK 0x0145 R [7:5] 0x0 Reserved R [4] 0x0 TCON vsync is stuck at 1(high)/0(low) R [3] 0x0 TCON hsync is stuck at 1(high)/0(low) R [2] 0x0 TCON data enable is stuck at 1(high)/0(low) R [1] 0x0 YUV data enable is stuck at 1(high)/0(low) R [0] 0x0 YUV clk / 1K is stuck at 1(high)/0(low) SMEAS_XK_PER_H_L 0x0146 R [7:0] 0x0 XCLKs per horizontal event - 1 SMEAS_XK_PER_H_M 0x0147 R [7:0] 0x0 SMEAS_XK_PER_H_H 0x0148 R [7:0] 0x0 SMEAS_XK_PER_V_L 0x0149 R [7:0] 0x0 XCLKs per vertical event - 1 SMEAS_XK_PER_V_M 0x014A R [7:0] 0x0 SMEAS_XK_PER_V_H 0x014B R [7:0] 0x0 Table 13: Sync Measurement Registers (Sheet 6 of 8) Register Name Addr Mode Bits Default Description |
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