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ADE3050SXT 数据表(PDF) 18 Page - STMicroelectronics |
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ADE3050SXT 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 88 page  ADC Block ADE3XXX 18/88 where fOUT and fXCLK are in MHz. The maximum output frequency of the fm frequency synthesizer is fXTAL x 2 (2+NDIV). Note that native duty cycle of the fm frequency synthesizer is not 50/50. We recommend to either enable the divide-by-two in the fm synthesizer block for frequencies up to fXCLK x 2 (1+NDIV) (typically 108 MHz) or set the output mux to a double wide output mode for pixel clocks above fXCLK x 2(1+NDIV). This will ensure a 50% duty clock on the output. 2.3 ADC Block The analog port consists of three 9-bit RGB ADCs with preamp, gain/offset adjustment and digital filtering. The I2C interface for the ADC block is in the INCLK clock domain which must be active for programming. Input voltage, gain and offset register settings are approximately related to the output code. In this equation, the output code (OUTPUT_CODE_8B) is equal to: 457 x offset / 28 + 181 x gain x input_mV / 216 - 125 x gain x offset / 216 - 219 Table 5: FM Frequency Synthesizer Registers Register Name Addr Mode Bits Default Description FM_FS_CTRL 0x0830 [7:4] Reserved R/W [3] 0x0 Clear the FM synthesizer R/W [2] 0x0 Clear the FS accumulator R/W [1] 0x0 Activate the frequency modulation R/W [0] 0x0 Divide the output by 2 FM_FS_PR_0 0x0831 R/W [7:0] 0x8000000 Phase Rate FM_FS_PR_1 0x0832 R/W [7:0] FM_FS_PR_2 0x0833 R/W [7:0] FM_FS_PR_3 0x0834 R/W [7:0] FM_FS_AMPLITUDE 0x0835 R/W [7:0] 0x0 LSB = 72 ps FM_FS_PERIODX64 0x0836 R/W [7:0] 0x80 LSB = 1.185 µs Table 6: ADC Registers Register Addr. Mode Bits Default Description ADC_DITHER 0x0324 [7] Reserved R/W [6] 0x0 Dither Horizontally R/W [5] 0x0 Dither Vertically R/W [4] 0x0 Dither Temporally R/W [3] 0x0 Force Dither High R/W [2] 0x0 Enable Dither [1:0] Reserved ADC_OFFSET_R 0x0326 R/W [7:0] 0x0 Offset Control, Red Channel ADC_OFFSET_G 0x0328 R/W [7:0] 0x0 Offset Control, Green Channel ADC_OFFSET_B 0x0329 R/W [7:0] 0x0 Offset Control, Blue Channel ADC_GAIN_R 0x032A R/W [7:0] 0x0 Gain Control, Red Channel ADC_GAIN_G 0x032B R/W [7:0] 0x0 Gain Control, Green Channel ADC_GAIN_B 0x032C R/W [7:0] 0x0 Gain Control, Blue Channel |
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