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TLE6280GP 数据表(PDF) 15 Page - Infineon Technologies AG |
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TLE6280GP 数据表(HTML) 15 Page - Infineon Technologies AG |
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15 / 25 page ![]() Datasheet TLE6280GP 15 2007-07-19 Electrical Characteristics (continued) Parameter and Conditions Symbol Values Unit at Tj = –40 … +150 °C, unless otherwise specified and supply voltage range VS = 8 ... 20V; fPWM = 20kHz; VCBxx>7.5V min typ max dI /dt limitation Non reaction level for dI/dt limitation (100% gate driver capability) @ VDIDT>0V VDIDT 2 -- -- V Non reaction level for dI/dt limitation (100% gate driver capability) @ VDIDT<0V VDIDT -- -- -2 V Max. VGxx at full reaction level for dI/dt limitation @ VDIDT = -5V @ TJ = -40°C @ TJ = +25°C @ TJ = +150°C VGxx(DIDT) -- -- -- 1.9 2.3 3.4 3.0 3.0 4.2 V Min. falltime at full reaction level for dI/dt limitation @ VDIDT = +5V @ TJ = -40°C @ TJ = +25°C @ TJ = +150°C tfall (DIDT) 20 20 20 65 68 70 -- -- -- µs Impedance of DIDT Pin to GND 10kHz<f<10MHz; VDIDT = 5V ZDIDT 60 Ω Default status of input pins: To assure a defined status of all input pins in case of disconnection, these pins are internally secured by pull-up or pull-down current sources with approx. 10µA. The following table shows the default status of each input pin. Input pin Default status ILx Low (ext. Mosfet off) IHx High (ext. Mosfet off) DIDT Low (no dI/dt limitation) DT 2µs dead time MFP Disable (pull-down) |
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