ST72F321 datasheet(75/189 Pages) STMICROELECTRONICS

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ST72321

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16-BIT TIMER (Cont’d)

10.4.3.4 Output Compare

In this section, the index, i, may be 1 or 2 because

there are 2 output compare functions in the 16-bit

timer.

This function can be used to control an output

waveform or indicate when a period of time has

elapsed.

When a match is found between the Output Com-

pare register and the free running counter, the out-

put compare function:

– Assigns pins with a programmable value if the

OCiE bit is set

– Sets a flag in the status register

– Generates an interrupt if enabled

Two 16-bit registers Output Compare Register 1

(OC1R) and Output Compare Register 2 (OC2R)

contain the value to be compared to the counter

These registers are readable and writable and are

not affected by the timer hardware. A reset event

changes the OCiR value to 8000h.

Timing resolution is one count of the free running

counter: (

fCPU/CC[1:0]).

Procedure:

To use the output compare function, select the fol-

lowing in the CR2 register:

– Set the OCiE bit if an output is needed then the

OCMPi pin is dedicated to the output compare i

signal.

– Select the timer clock (CC[1:0]) (see Table 16

Clock Control Bits).

And select the following in the CR1 register:

– Select the OLVLi bit to applied to the OCMPi pins

after the match occurs.

– Set the OCIE bit to generate an interrupt if it is

needed.

When a match is found between OCRi register

and CR register:

– OCFi bit is set.

– The OCMPi pin takes OLVLi bit value (OCMPi

pin latch is forced low during reset).

– A timer interrupt is generated if the OCIE bit is

set in the CR1 register and the I bit is cleared in

the CC register (CC).

The OCiR register value required for a specific tim-

ing application can be calculated using the follow-

ing formula:

Where:

∆t

= Output compare period (in seconds)

fCPU

= CPU clock frequency (in hertz)

PRESC = Timer prescaler factor (2, 4 or 8 de-

pending on CC[1:0] bits, see Table 16

Clock Control Bits)

If the timer clock is an external clock, the formula

is:

Where:

∆t

= Output compare period (in seconds)

fEXT

= External timer clock frequency (in hertz)

Clearing the output compare interrupt request (i.e.

clearing the OCFi bit) is done by:

1. Reading the SR register while the OCFi bit is

set.

2. An access (read or write) to the OCiLR register.

The following procedure is recommended to pre-

vent the OCFi bit from being set between the time

it is read and the write to the OCiR register:

– Write to the OCiHR register (further compares

are inhibited).

– Read the SR register (first step of the clearance

of the OCFi bit, which may be already set).

– Write to the OCiLR register (enables the output

compare function and clears the OCFi bit).

MS Byte

LS Byte

OCiROCiHR

OCiLR

∆ OCiR = ∆t * fCPU

PRESC

∆ OCiR = ∆t

* fEXT

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