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ST72F321 数据表(PDF) 12 Page - STMicroelectronics |
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ST72F321 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 189 page ![]() ST72321 12/189 Notes: 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. 2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD are not implemented). See See “I/O PORTS” on page 46. and Section 12.8 I/O PORT PIN CHARACTER- ISTICS for more details. 3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil- lator; see Section 1 INTRODUCTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for more details. 4. On the chip, each I/O port may have up to 8 pads. Pads that are not bonded to external pins are in input pull-up configuration after reset. The configuration of these pads must be kept at reset state to avoid add- ed current consumption. 51 36 PA6 (HS)/SDAI I/O CT HS X TPort A6 I2C Data 1) 52 37 PA7 (HS)/SCLI I/O CT HS X TPort A7 I2C Clock 1) 53 38 VPP/ ICCSEL I Must be tied low. In flash programming mode, this pin acts as the programming voltage input VPP. See Section 12.9.2 for more details. High voltage must not be applied to ROM devices 54 39 RESET I/O CT Top priority non maskable interrupt. 55 - EVD External voltage detector 56 TLI I CT X Top level interrupt input pin 57 40 VSS_2 S Digital Ground Voltage 58 41 OSC23) I/O Resonator oscillator inverter output 59 42 OSC13) I External clock input or Resonator oscil- lator inverter input 60 43 VDD_2 S Digital Main Supply Voltage 61 44 PE0/TDO I/O CT X X X X Port E0 SCI Transmit Data Out 62 1 PE1/RDI I/O CT X X X X Port E1 SCI Receive Data In 63 - PE2 (Flash device) I/O CT X Port E2 Caution: In Flash devices this port is al- ways input with weak pull-up. PE2 (ROM device) X XX Port E2 Caution: In ROM devices, no weak pull-up present on this port. In TQFP44 this pin is not connected to an internal pull-up like other unbonded pins (See note 4). It is recommended to configure it as output push pull to avoid added current consumption. 64 - PE3 I/O CT X XX X Port E3 Pin n° Pin Name Level Port Main function (after reset) Alternate function Input Output |
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