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AS4SD16M16 数据表(PDF) 45 Page - Micross Components |
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AS4SD16M16 数据表(HTML) 45 Page - Micross Components |
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45 / 52 page ![]() SDRAM AS4SD16M16 AS4SD16M16 Rev. 2.6 04/13/15 Micross Components reserves the right to change products or specifications without notice. 45 SINGLE WRITE - WITHOUT AUTO PRECHARGE1 *CAS latency indicated in parentheses. NOTES: 1. For this example, the burst length = 1, and the WRITE burst is followed by a “manual” PRECHARGE. 2. 14ns to 15ns is required between <D IN m> and the PRECHARGE command, regardless of frequency. With a single write tWR has been increased to meet minimum t RAS requirement. 3. A9, A11, and A12 = “Don’t Care” 4. PRECHARGE command not allowed else t RAS would be violated. TIMING PARAMETERS MIN MAX MIN MAX tAH 0.8 ns tCMS 1.5 ns tAS 1.5 ns tDH 0.8 ns tCH 2.5 ns tDS 1.5 ns tCL 2.5 ns tRAS 44 80,000 ns tCK(3) 7.5 ns tRC 66 ns tCK(2) 10 ns tRCD 20 ns tCKH 0.8 ns tRP 20 ns tCKS 1.5 ns tWR 15 ns tCMH 0.8 ns -75 UNITS -75 SYMBOL* UNITS SYMBOL* |
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