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AS4SD16M16 数据表(PDF) 1 Page - Micross Components |
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AS4SD16M16 数据表(HTML) 1 Page - Micross Components |
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1 / 52 page ![]() SDRAM AS4SD16M16 AS4SD16M16 Rev. 2.6 04/13/15 Micross Components reserves the right to change products or specifications without notice. 1 FEATURES • Full Military temp (-55°C to 125°C) processing available • Configuration: 16 Meg x 16 (4 Meg x 16 x 4 banks) • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for hiding row access/precharge • Programmable burst lengths: 1, 2, 4, 8 or full page • Auto Precharge, includes CONCURRENT AUTO PRECHARGE and Auto Refresh Modes • Self Refresh Mode (IT & ET) • 64ms, 8,192-cycle refresh (IT) • 24ms 8,192 cycle recfresh (XT) • WRITE Recovery (t WR = “2 CLK”) • LVTTL- compatible inputs and outputs • Single +3.3V ±0.3V power supply OPTIONS MARKING • Plastic Package 54-pin TSOPII (400 mil) DG No. 901 (Pb/Sn finish or RoHS available) • Timing (Cycle Time) 7.5ns @ CL = 3 (PC133) or -75 10ns @ CL = 2 (PC100) • Operating Temperature Ranges -Industrial Temp (-40°C to 85° C) IT -Enhanced Temp (-40°C to +105°C) ET -Military Temp (-55°C to 125°C) XT *Off-center parting line **CL = CAS (READ) latency Package may or may not be assembled with a location notch. PIN ASSIGNMENT (Top View) 54-Pin TSOP Note: “\” indicates an active low. 256 MB: 16 Meg x 16 SDRAM Synchronous DRAM Memory For more products and information please visit our web site at www.micross.com KEY TIMING PARAMETERS SPEED CLOCK SETUP HOLD GRADE FREQUENCY CL = 2** CL = 3** TIME TIME -75 133 MHz – 5.4ns 1.5ns 0.8ns -75 100 MHz 6ns – 1.5ns 0.8ns ACCESS TIME Configuration 4 Meg x 16 x 4 banks Refresh Count 8K Row Addressing 8K (A0-A12) Bank Addressing 4 (BA0, BA1) Column Addressing 512 (A0-A8) 16 Meg x 16 |
类似零件编号 - AS4SD16M16 |
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类似说明 - AS4SD16M16 |
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