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SST25WF080B 数据表(PDF) 4 Page - Microchip Technology

部件名 SST25WF080B
功能描述  8 Mbit 1.8V SPI Serial Flash
PDF  39 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

SST25WF080B 数据表(HTML) 4 Page - Microchip Technology

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SST25WF080B
DS20005164C-page 4
 2014 Microchip Technology Inc.
2.0
PIN DESCRIPTION
FIGURE 2-1:
PIN ASSIGNMENTS
TABLE 2-1:
PIN DESCRIPTION
Symbol
Pin Name
Functions
SCK
Serial Clock
To provide the input/output timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
SI
Serial Data Input
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
SO
Serial Data Output To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
SIO[0:1]
Serial Data Input/
Output for Dual I/O
Mode
To transfer commands, addresses, or data serially into the device, or data out of
the device. Inputs are latched on the rising edge of the serial clock. Data is
shifted out on the falling edge of the serial clock. These pins are used in Dual
I/O mode
CE#
Chip Enable
The device is enabled by a high to low transition on CE#. CE# must remain low
for the duration of any command sequence. The device is deselected and
placed in Standby mode when CE# is high.
WP#
Write Protect
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status reg-
ister.
HOLD#
Hold
To temporarily stop serial communication with SPI Flash memory while device
is selected.
VDD
Power Supply
To provide power supply voltage: 1.65-1.95V for SST25WF080B
VSS
Ground
8-Lead SOIC
8-Contact USON
1
2
3
4
8
7
6
5
CE#
SO/SIO1
WP#
VSS
VDD
HOLD#
SCK
SI/SIO0
25164 08-soic-P0.0
1
2
3
4
8
7
6
5
CE#
SO/SIO1
WP#
VSS
Top View
VDD
HOLD#
SCK
SI/SIO0
25164 08-uson Q3A P1.0



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