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SST25WF080B 数据表(PDF) 18 Page - Microchip Technology |
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SST25WF080B 数据表(HTML) 18 Page - Microchip Technology |
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18 / 39 page ![]() SST25WF080B DS20005164C-page 18 2014 Microchip Technology Inc. 5.13 Power-Down The Deep Power-Down (DPD) instruction puts the device in the lowest power consumption mode – the Deep Power-Down mode. This instruction is ignored if the device is busy with an internal write operation. While the device is in DPD mode, all instructions are ignored except for the Release Deep Power-Down instruction or Read ID. To initiate deep power-down, input the Deep Power- Down instruction (B9H) while driving CE# low. CE# must be driven high before executing the DPD instruc- tion. After driving CE# high, it requires a delay of TDPD before the standby current ISB is reduced to the deep power-down current IDPD. See Figure 5-13 for the DPD instruction sequence. Exit the power-down state using the Release from Deep Power-Down or Read ID instruction. CE# must be driven low before sending the Release from Deep Power-Down command cycle (ABH), and then driving CE# high. The device will return to Standby mode and be ready for the next instruction after TSBR. See Figure 5-14. for the Release from Deep Power-Down sequence. FIGURE 5-13: DEEP POWER-DOWN SEQUENCE FIGURE 5-14: RELEASE FROM DEEP POWER-DOWN SEQUENCE CE# SO SI SCK 01 2 3 4 5 6 7 B9 HIGH IMPEDANCE MODE 0 MODE 3 25164 F46.1 MSB TDPD CE# SO SI SCK 01 2 3 4 5 6 7 AB HIGH IMPEDANCE MODE 0 MODE 3 25164 F47.1 MSB TSBR |
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