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STM32F413MH 数据表(PDF) 173 Page - STMicroelectronics |
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STM32F413MH 数据表(HTML) 173 Page - STMicroelectronics |
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173 / 207 page  DocID029162 Rev 2 173/207 STM32F413xG/H Electrical characteristics 174 Figure 61. SDIO high-speed mode Figure 62. SD default mode Table 99. SD / MMC characteristics(1)(2) Symbol Parameter Conditions Min Typ Max Unit fPP Clock frequency in data transfer mode - 0 - 50 MHz - SDIO_CK/fPCLK2 frequency ratio - - - 8 / 3 - tW(CKL) Clock low time fpp =50MHz 9.5 10.5 - ns tW(CKH) Clock high time fpp =50MHz 8.5 9.5 - CMD, D inputs (referenced to CK) in MMC and SD HS mode tISU Input setup time HS fpp =50MHz 5 - - ns tIH Input hold time HS fpp =50MHz 1 - - CMD, D outputs (referenced to CK) in MMC and SD HS mode tOV Output valid time HS fpp =50MHz - 12 13.5 ns tOH Output hold time HS fpp =50MHz 10.5 - - |
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