AD1812

REV. 0

–11–

Modem Interface Signals

Pin Name

P/TQFP

I/O

Description

MODEM_IRQ

38

I

Modem IRQ. The external modem asserts this pin HI to indicate a pending inter-

rupt. The AD1812 converts this signal to the appropriate interrupt in either Plug

and Play (LDN = 5) or Non-Plug and Play mode.

MODEM_EN

39

I

Modem Enable. When this pin is asserted (HI), the AD1812 enables the logical

device (LDN = 5) for an external modem chipset. Otherwise, LDN = 5 does not

exist. The state of this pin should not be altered after reset.

MODEM_SEL

118

O

Modem Select. This active LO pin is a chip select for an external modem chipset.

The AD1812 decodes the (Plug & Play or Non-Plug and Play) configured ISA

bus address. AEN must be LO before asserting the MODEM_SEL pin.

Game Port

Pin Name

P/TQFP

I/O

Description

A_1

41

I

Game Port A, Button #1.

A_2

42

I

Game Port A, Button #2.

A_X

46

I

Game Port A X-Axis.

A_Y

47

I

Game Port A Y-Axis.

B_1

43

I

Game Port B, Button #1.

B_2

44

I

Game Port B, Button #2.

B_X

48

I

Game Port B X-Axis.

B_Y

49

I

Game Port B Y-Axis.

MIDI Interface Signals

Pin Name

P/TQFP

I/O

Description

MIDI_IN

31

I

RXD MIDI Input.

MIDI_OUT

96

O

TXD MIDI Output.

Miscellaneous

Pin Name

P/TQFP

I/O

Description

PNP

37

I

Plug and Play Select. When this pin is asserted (HI), the Plug and Play

mode is enabled. If PnP is LO, the AD1812 operates in legacy mode, and

the Plug and Play configuration is disabled.

XTALO

30

O

14.31818 MHz Crystal Output.

XTALI

29

I

14.31818 MHz Clock Input, can be OSC from the ISA bus.

PWRDWN

36

I

Power Down Signal. Active LO.

VREF_X

60

O

Voltage Reference.

VREF

59

I

Voltage Reference Filter.

L_FILT

54

I

Left Channel Filter Input.

R_FILT

53

I

Right Channel Filter Input.

XCTL0

95

O

External Control 0. The state of this pin (TTL HI or LO) is reflected in

codec indexed register 0x0A, Bit 6.

XCTL1

159

O

External Control 1. The state of this pin (TTL HI or LO) is reflected in

codec indexed register 0x0A, Bit 7.

GVC

40

I

Game Port Voltage Capacitor.

NC

1–4, 81, 120–125,

No Connect.

156–158, 160