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AD1812JS 数据表(PDF) 17 Page - Analog Devices |
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AD1812JS 数据表(HTML) 17 Page - Analog Devices |
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17 / 20 page ![]() AD1812 REV. 0 –17– SYSTEM TIMING AND CONTROL If the AD1812 is not connected directly to the OSC clock on the ISA bus, a single fundamental-mode and parallel-tuned 14.31818 MHz crystal oscillator can be substituted to derive all timing parameters. Future feature enhanced, pin-compatible versions of the SoundPort Controller will require a 33 MHz clock or crystal input. Analog Devices suggests developing board layouts that can be easily modified to supply the new clock. DATA AND CONTROL TRANSFERS The embedded SoundPort Stereo Codec supports a DMA request/grant architecture for transferring data with the host computer bus. One or two 8-bit or 16-bit DMA channels can be supported. Programmed I/O (PIO) mode is also supported for control register accesses and for applications lacking DMA control. PIO transfers can be made on one channel while the other is performing DMA. Transfers to and from the AD1812 are asynchronous relative to the internal data conversion clock. Transfers are buffered by FIFOs located in the capture and playback paths. REFERENCE DESIGNS AND DEVICE DRIVERS Reference designs and device drivers using the AD1812 are available via Bulletin Board Service. The Computer Products Division runs a BBS that can be reached at speeds up to 14,400 baud, no parity, 8 bits data, 1 stop bit, by dialing (617) 461- 4258. The BBS supports: V.32bis, error correction (V.42 and MNP classes 2, 3, and 4), and data compression (V.42bis and MNP class 5). Reference designs can also be found in the AD1812 SoundPort Controller Technical Reference which can be obtained by contacting your local Analog Devices sales repre- sentative or authorized distributor. You can also find us on the World Wide Web at http://www.analog.com. FREQUENCY RESPONSE PLOTS SAMPLE FREQUENCY – FS 10 –90 –120 0 1.0 0.1 0.2 0.4 0.5 0.6 0.7 0.8 0.9 0 –80 –100 –110 –50 –70 –40 –60 –20 –10 –30 0.3 Figure 8. Analog-to-Digital Frequency Response to FS (Full-Scale Line-Level Inputs, –1 dB Gain) SAMPLE FREQUENCY – FS 10 –90 –120 0.40 0.44 0.48 0.56 0.60 0.64 0.68 0.70 0 –80 –100 –110 –50 –70 –40 –60 –20 –10 –30 0.52 Figure 9. Analog-to-Digital Frequency Response — Transition Band (Full-Scale Line-Level Inputs, –1 dB Gain) SAMPLE FREQUENCY – FS 10 –90 –120 0 1.0 0.1 0.2 0.4 0.5 0.6 0.7 0.8 0.9 0 –80 –100 –110 –50 –70 –40 –60 –20 –10 –30 0.3 Figure 10. Digital-to-Analog Frequency Response to FS (Full-Scale Inputs, 0 dB Attenuation) SAMPLE FREQUENCY – FS 10 –90 –120 0.40 0.44 0.48 0.56 0.60 0.64 0.68 0.70 0 –80 –100 –110 –50 –70 –40 –60 –20 –10 –30 0.52 Figure 11. Digital-to-Analog Frequency Response — Transition Band (Full-Scale Inputs, 0 dB Attenuation) |
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