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STW4510 数据表(PDF) 27 Page - STMicroelectronics |
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STW4510 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 57 page ![]() Obsolete Product(s) - Obsolete Product(s) STw4510 Functional description 27/57 Power control register @ 08h Address: 08h Type: R/W Reset: 0000_1000 Description: 3.2.9 IT generation STw4510 has one interrupt signal: VddOK. This signal has two functions: ● When VddOK is high, Vsdc1 and Vsdc2 output voltages are within the right range ● When VddOK is low, – it means that step-up DC/DC output converter (Vsdc1 or Vsdc2) are not regulated properly. The internal interrupt set to “1” the bit 5 of the Application control register 2. This bit is reset after reading. – it means that the signal Pwren is low and sleep mode has been requested. Address 1Fh Address 1Eh 15 14 13 12 11 10 98765 43210 R/W R/W R/W R/W [15:10]Reserved [4]Reserved [3]en_monitoring 0: Disabled/ Monitoring = OFF 1: Enabled/Vsdc1 & Vsdc2 monitoring = ON (default) [2]en_vana2 0: Vana2 in power down mode (default) 1: Vana2 enabled in high power mode [1]Reserved [0]EN 0: Read enabled (default) 1: Write enabled |
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