STW4510 datasheet(46/57 Pages) STMICROELECTRONICS

46 / 57 page

Obsolete

Product(s)

- Obsolete

Product(s)

Electrical and timing characteristics

STw4510

46/57

4.2.6

Power supply monitoring

This block monitors the Vsdc1 and Vsdc2 output voltage. If Vsdc1 or Vsdc2 drops below the

threshold, the processor is reset.

4.3

Digital specifications

All electrical specifications having the VddIO voltage as reference will be able to sustain

1.8 V or 2.8 V ± 5 % for VddIO voltage supply.

VddIO ball could be connected to Vsdc2 at 1.8 V or to external voltage at 1.8 V or at a

maximum voltage of 2.8 V ± 5 %

4.3.1

CMOS input/output static characteristics: I²C interface

Table 24.

Power supply monitoring

Symbol

Description

Test conditions

Min.

Typ.

Max.

Units

Threshold

THCORE

Threshold Vsdc1

Vsdc1 = 1.2 V or 1.5 V

-3%

Vsdc1-150

+3%

Vsdc1 = 1 V

-3%

Vsdc1-100

+3%

THVIO

Threshold Vsdc2

-3%

1.65

+3%

Table 25.

CMOS input/output static characteristics: I²C interface

Symbol

Description

Test conditions

Min.

Typ.

Max.

Units

I²C interface

VIL

Low level input voltage

0.3*VddIO

VIH

High level input voltage

0.7*VddIO

IIL

Low level input current

-1.0

1.0

µA

IIH

High level input current

-1.0

1.0

µA

VOL

Low level output voltage

IOL = 3mA (with open

drain or open collector)

0.2*VddIO

VOH

High level output voltage

IOL = 3mA (with open

drain or open collector)

0.8*VddIO

STW4510 数据表(PDF) 46 Page - STMicroelectronics

STW4510 数据表(HTML) 46 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表下载