Data Sheet

ADA4961

Rev. A | Page 13 of 24

CH1 40mV/DIV

10ns/DIV

A CH2

1.53V

1

2

CH2 500mV/DIV

Figure 34. Fast Attack Assertion Time, Low Gain to High Gain, 8 dB Step

5

–15

–10

–5

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0

FREQUENCY (GHz)

GAIN = +15dB

GAIN = –6dB

Figure 35. Phase Delay vs. Frequency for All Gain Settings