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LM64 数据表(PDF) 11 Page - National Semiconductor (TI) |
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LM64 数据表(HTML) 11 Page - National Semiconductor (TI) |
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11 / 29 page ![]() 1.0 Functional Description (Continued) 2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command. 3. Alerting Device(s) send ACK. 4. Alerting Device(s) send their address. While transmitting their address, alerting devices sense whether their ad- dress has been transmitted correctly. (The LM64 will reset its ALERT output and set the ALERT Mask bit once its complete address has been transmitted successfully.) 5. Master/slave NoACK 6. Master sends STOP 7. Master attends to conditions that caused the ALERT to be triggered. The ALERT Status Register is read and fan started, setpoints adjusted, etc. 8. Master resets the ALERT Mask bit in the Configuration Register. The ARA, 000 1100, is a general call address. No device should ever be assigned to this address. The ALERT Configuration bit in the Remote Diode Tempera- ture Filter and Comparator Mode Register must be set low in order for the LM64 to respond to the ARA command. The ALERT output can be disabled by setting the ALERT Mask bit in the Configuration Register. The power-on default is to have the ALERT Mask bit and the ALERT Configuration bit low. 1.3 SMBus INTERFACE Since the LM64 operates as a slave on the SMBus, the SMBCLK line is an input and the SMBDAT line is bi- directional. The LM64 never drives the SMBCLK line and it does not support clock stretching. The LM64 has two hardware-selectable 7-bit slave addresses. The user may input a logical High or Low on the A0 Address pin to select one of the two pre-programmed SMBus slave addresses. The options are as follows: A0 Pin SMBus Address 0x[Hex] SMBus Slave Address Bits A6 A5 A4 A3 A2 A1 A0 0 18 001100 0 1 4E 100111 0 1.4 POWER-ON RESET (POR) DEFAULT STATES For information on the POR default states see Section 2.2 LM64 Register Map in Functional Order. 20065509 FIGURE 6. ALERT Output as an SMBus ALERT Temperature Response Diagram www.national.com 11 |
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