LM64 datasheet(23/29 Pages) NSC

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2.0 LM64 Registers (Continued)

ALERT Status And Mask Registers

ADDRESS

Hex

Read/

Write

Bits

POR

Value

Name

Description

HEX ALERT STATUS REGISTER (8-bits) (All Alarms are latched until read, then cleared if alarm condition was removed

at the time of the read.)

0x02

Read

Only

Busy

When this bit is a 0, the ADC is not converting.

When this bit is set to a 1, the ADC is performing a conversion. This bit

does not affect ALERT status.

Local

High Alarm

When this bit is a 0, the internal temperature of the LM64 is at or below

the Local High Setpoint.

When this bit is a 1, the internal temperature of the LM64 is above the

Local High Setpoint, and an ALERT is triggered.

This bit is unused and always read as 0.

Remote

High Alarm

When this bit is a 0, the temperature of the Remote Diode is at or below

the Remote High Setpoint.

When this bit is a 1, the temperature of the Remote Diode is above the

Remote High Setpoint, and an ALERT is triggered.

Remote

Low Alarm

When this bit is a 0, the temperature of the Remote Diode is at or above

the Remote Low Setpoint.

When this bit is a 1, the temperature of the Remote Diode is below the

Remote Low Setpoint, and an ALERT is triggered.

Remote Diode

Fault Alarm

When this bit is a 0, the Remote Diode appears to be correctly

connected.

When this bit is a 1, the Remote Diode may be disconnected or shorted.

This Alarm does not trigger an ALERT.

Remote

T_CRIT Alarm

When this bit is a 0, the temperature of the Remote Diode is at or below

the T_CRIT Limit.

When this bit is a 1, the temperature of the Remote Diode is above the

T_CRIT Limit, and an ALERT is triggered.

Tach Alarm

When this bit is a 0, the Tachometer count is lower than or equal to the

Tachometer Limit (the RPM of the fan is greater than or equal to the

minimum desired RPM).

When this bit is a 1, the Tachometer count is higher than the

Tachometer Limit (the RPM of the fan is less than the minimum desired

RPM), and an ALERT is triggered.

HEX ALERT MASK REGISTER (8-bits)

R/W

This bit is unused and always read as 1.

Local High

Alarm Mask

When this bit is a 0, a Local High Alarm event will generate an ALERT.

When this bit is a 1, a Local High Alarm will not generate an ALERT

This bit is unused and always read as 1.

Remote

High Alarm Mask

When this bit is a 0, Remote High Alarm event will generate an ALERT.

When this bit is a 1, a Remote High Alarm event will not generate an

ALERT.

Remote

Low Alarm

Mask

When this bit is a 0, a Remote Low Alarm event will generate an

ALERT.

When this bit is a 1, a Remote Low Alarm event will not generate an

ALERT.

This bit is unused and always read as 1.

Remote

T_CRIT

Alarm Mask

When this bit is a 0, a Remote T_CRIT event will generate an ALERT.

When this bit is a 1, a Remote T_CRIT event will not generate an

ALERT.

Tach

Alarm Mask

When this bit is a 0, a Tach Alarm event will generate an ALERT.

When this bit is a 1, a Tach Alarm event will not generate an ALERT.

LM64 数据表(PDF) 23 Page - National Semiconductor (TI)

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