Data Sheet

ADA4817-1/ADA4817-2

Rev. C | Page 15 of 25

(though with the ADA4817-1/ADA4817-2 input currents in the

picoamp range, this is likely not a concern). To include common-

modeled by

CMR

V

PSR

V

V

V

CM

S

nom

OS

OS

Δ

Δ







(11)

where:

nom

OS

V

is the offset voltage specified at nominal conditions.

PSR is the power supply rejection.

conditions.

CMR is the common-mode rejection.

WIDEBAND OPERATION

The ADA4817-1/ADA4817-2 provides excellent performance as

a high speed buffer. Figure 41 shows the circuit used for wideband

characterization for high gains. The impedance at the summing

amplifier with the input capacitance of the amplifier of 1.3 pF.

This pole can cause peaking and ringing if its frequency is too

low. Feedback resistances of 100 Ω to 400 Ω are recommended

because they minimize the peaking and they do not degrade

the performance of the output stage. Peaking in the frequency

response can also be compensated for with a small feedback

resistor in the noninverting input, as shown in Figure 45.

The distortion performance depends on a number of variables:



The closed-loop gain of the application



Whether it is inverting or noninverting



Amplifier loading



Signal frequency and amplitude



Board layout

The best performance is usually obtained in the G + 1

configuration with no feedback resistance, big output

load resistors, and small board parasitic capacitances.

DRIVING CAPACITIVE LOADS

In general, high speed amplifiers have a difficult time driving

capacitive loads. This is particularly true in low closed-loop

gains, where the phase margin is the lowest. The difficulty

by the following equation:

L

O

P

C

R

f

2π

1



(12)

If this pole occurs too close to the unity-gain crossover point,

the phase margin degrades. This is due to the additional phase

loss associated with the pole.

Note that such capacitance introduces significant peaking in the

frequency response. Larger capacitance values can be driven but

a zero that cancels the pole introduced by the load capacitance.

typically based on the circuit requirements. Figure 45 also shows

another way to reduce the effect of the pole created by the capacitive

to the feedback resistor Typical capacitor values can range from

0.5 pF to 2 pF. Figure 46 shows the effect of adding a feedback

capacitor to the frequency response.

0.1µF

0.1µF

10µF

49.9Ω

0.1µF

10µF

THERMAL CONSIDERATIONS

With 10 V power supplies and 19 mA quiescent current, the

ADA4817-1/ADA4817-2 dissipate 190 mW with no load. This

implies that in the LFCSP, whose thermal resistance is 94°C/W

for the ADA4817-1 and 64°C/W for the ADA4817-2, the junction

temperature is typically almost 25° higher than the ambient

temperature. The ADA4817-1/ADA4817-2 can maintain a

constant bandwidth over temperature; therefore, an initial ramp

up of the current consumption during warm-up is expected.

change up to 0.3 mV due to warm-up effects for an ADA4817-1/

ADA4817-2 in a LFCSP on 10 V. The input bias current

increases by a factor of 1.7 for every 10°C rise in temperature.

Heavy loads increase power dissipation and raise the chip

junction temperature as described in the Absolute Maximum

Ratings section. Take care not to exceed the rated power

dissipation of the package.

POWER-DOWN OPERATION

The ADA4817-1/ADA4817-2 are equipped with separate power-

down pins (PD) for each amplifier that allow the user the ability to

reduce the quiescent supply current when an amplifier is

inactive from 19 mA to below 2 mA. The power-down threshold

supply application, the enable voltage is greater than +4 V, and in a

+3 V, −2 V supply application, the enable voltage is greater than

+2 V. However, the amplifier is powered down whenever the

connect it to the positive supply to ensure proper start-up.