ADA4817-1/ADA4817-2

Data Sheet

Rev. C | Page 2 of 25

TABLE OF CONTENTS

Features .............................................................................................. 1

 

Applications....................................................................................... 1

 

Connection Diagrams...................................................................... 1

 

General Description ......................................................................... 1

 

Revision History ............................................................................... 2

 

Specifications..................................................................................... 3

 

±5 V Operation............................................................................. 3

 

5 V Operation ............................................................................... 4

 

Absolute Maximum Ratings............................................................ 5

 

Thermal Resistance ...................................................................... 5

 

Maximum Safe Power Dissipation ............................................. 5

 

ESD Caution.................................................................................. 5

 

Pin Configurations and Function Descriptions ........................... 6

 

Typical Performance Characteristics ............................................. 8

 

Test Circuits..................................................................................... 13

 

Theory of Operation ...................................................................... 14

 

Closed-Loop Frequency Response........................................... 14

 

Noninverting Closed-Loop Frequency Response .................. 14

 

Inverting Closed-Loop Frequency Response ............................. 14

 

Wideband Operation ................................................................. 15

 

Driving Capacitive Loads.......................................................... 15

 

Thermal Considerations............................................................ 15

 

Power-Down Operation ............................................................ 15

 

Capacitive Feedback................................................................... 16

 

Higher Frequency Attenuation................................................. 16

 

Layout, Grounding, and Bypassing Considerations .................. 17

 

Signal Routing............................................................................. 17

 

Power Supply Bypassing ............................................................ 17

 

Grounding ................................................................................... 17

 

Exposed Paddle........................................................................... 17

 

Leakage Currents........................................................................ 18

 

Input Capacitance ...................................................................... 18

 

Input-to-Input/Output Coupling............................................. 18

 

Applications Information .............................................................. 19

 

Low Distortion Pinout............................................................... 19

 

Wideband Photodiode Preamp ................................................ 19

 

High Speed JFET Input Instrumentation Amplifier.............. 21

 

Active Low-Pass Filter (LPF) .................................................... 22

 

Outline Dimensions ....................................................................... 24

 

Ordering Guide .......................................................................... 25

 

REVISION HISTORY

5/2016—Rev. B to Rev. C

Changed CP-8-2 to CP-8-13 ........................................ Throughout

Changes to Figure 1, Figure 2, and Figure 3.................................. 1

Changes to Figure 5, Table 5, Figure 6, and Table 6..................... 6

Changes to Figure 7 and Table 7..................................................... 7

Updated Outline Dimensions ....................................................... 24

Changes to Ordering Guide .......................................................... 25

5/2013—Rev. A to Rev. B

Changes to Figure 3.......................................................................... 1

Changes to Figure 7.......................................................................... 7

Updated Outline Dimensions ....................................................... 24

Changes to Ordering Guide .......................................................... 25

3/2009—Rev. 0 to Rev. A

Added 8-Lead SOIC Package............................................Universal

Changes to Features Section and General Description Section..1

Changes to Table 1.............................................................................3

Changes to Table 2.............................................................................4

Changes to Figure 4...........................................................................5

Changes to Figure 9, Figure 11, and Figure 12 ..............................8

Changes to Figure 21, Figure 22, and Figure 24 ......................... 10

Changes to Figure 33...................................................................... 12

Added Figure 34; Renumbered Sequentially .............................. 12

Changes to Thermal Considerations Section and Power-Down

Operation Section........................................................................... 15

Changes to Capacitive Feedback Section and Figure 46 ........... 16

Added Higher Frequency Attenuation Section, Figure 47,

Figure 48, and Figure 49; Renumbered Sequentially................. 16

Updated Outline Dimensions....................................................... 24

Changes to Ordering Guide .......................................................... 25

11/2008—Revision 0: Initial Version