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P9025AC-RNBGI 数据表(PDF) 4 Page - Integrated Device Technology |
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P9025AC-RNBGI 数据表(HTML) 4 Page - Integrated Device Technology |
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4 / 20 page ![]() 5W, QI WIRELESS POWER RECEIVER WITH INTEGRATED RECTIFIER AND LDO OUTPUT 4 09/01/15 P9025AC DATASHEET NOTES: 1. Guaranteed by design and not subject to 100% production testing. 2. Guaranteed by design and simulation. tSU:STA Set-up Time for Repeated START Condition 0.6 µs tSU:DAT Data Setup Time 100 ns tHD:DAT Data Hold Time 0.9 µs tSU:STO Setup Time for STOP 0.6 µs tBUF Bus Free Time between STOP & START 1.3 µs tR Rise Time of both SDA and SCL Signals (Note 1,2) 20 + 0.1 CB 300 ns tF Fall Time of both SDA and SCL Signals1,2 20 + 0.1 CB 300 ns TSP Spike Pulse Widths Suppressed by Input Filter1,2 050 ns CB Capacitive Load for each Bus Line1,2 400 pF CBIN SCL, SDA Input Capacitance1,2 60 pF VIL Input Threshold Low 0.4 V VIH Input Threshold High 1.4 V II Input Leakage Current -1.0 1.0 µA Symbol Description Conditions Min Typ Max Units |
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