5W, QI WIRELESS POWER RECEIVER WITH INTEGRATED RECTIFIER AND LDO OUTPUT

6

09/01/15

P9025AC DATASHEET

Pin Configuration

Pin Descriptions

Pin #

Name

Type

Function

1INT

O

Interrupt output. Open drain output pin. A low state indicates that an over-current, over-voltage, or

over-temperature condition has occurred. If used, connect a 100KΩ pullup resistor to the OUT pin

or compatible system I/O voltage rail.

2

DNC1

DNC

DO NOT connect. It is internally connected. This pin must be left floating.

3

DNC2

DNC

DO NOT connect. It is internally connected. This pin must be left floating.

4

BST2

O

Bootstrap output for high-side rectifier FET 2. Connect a 0.01µF capacitor from AC2 pin to BST2.

5

BST1

O

Bootstrap output for high-side rectifier FET 1. Connect a 0.01µF capacitor from AC1 pin to BST1.

6

AC1

I

AC1 input to the Internal full-wave rectifier.

7

VRECT

O

Output of the full-wave rectifier. Bypass this pin with ceramic capacitors to power ground.

8

RLIM

I

Current-limit resistor. A resistor connected between this pin and ground sets the current limit of the

5V LDO output.

9

SNS

I

LDO output sense pin. Connect to the OUT pin.

10

CHG_END /

CS100

I

Active-high input pin. Default setting is a Charge-End active-high input from an external battery

charger to terminate power transfer. Alternatively, a Charge-Status active high input which will

send a WPC Charge Status packet with value 100 (100% charge). This pin has an internal pull

down resistor.

1

2

3

4

5

6

7

8

23

22

21

20

19

18

17

24

INT

DNC1

DNC2

BST2

BST1

AC1

VRECT

RLIM

NC4

ACM2

PGND1

ACM1

FOD2

CLAMP1

PGND2

CLAMP2

EP