ADA4807-2ACPZ-R2 datasheet(26/33 Pages) AD

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ADA4807-1/ADA4807-2/ADA4807-4

Data Sheet

Rev. B | Page 26 of 33

APPLICATIONS INFORMATION

CAPACITIVE LOAD DRIVE

Figure 67 shows the schematic for driving large capacitive loads, and

Figure 68 shows the frequency response for a gain of +2. Note that

the bandwidth decreases with larger capacitive loads (see Figure 68).

Figure 69 shows the required series resistor (RSERIES) when

limiting the peaking to 3 dB for a range of load capacitors

(CLOAD) at a gain of +2. From Figure 69, no series resistors are

necessary to maintain stability for larger capacitors.

RSERIES

VLOAD

49.9Ω

VOUT

VIN

RLOAD

CLOAD

Figure 67. Schematic for Driving Large Capacitive Loads

–18

–15

–12

–9

–6

–3

0.1

100

1000

FREQUENCY (MHz)

VS = ±5V

RLOAD = 1kΩ

G = +2

VOUT = 70mV p-p

100nF, 0.5Ω

10nF, 1.69Ω

1nF, 10.5Ω

15pF, 100Ω

47pF, 82.5Ω

470pF, 20Ω

Figure 68. Frequency Response for Driving Large Capacitive Loads,

RF = RG = 249 Ω

100

0.001

0.01

0.1

100

CLOAD (nF)

Figure 69. Required Series Resistor (RSERIES) vs. Capacitive Load (CLOAD)

at 3 dB Peaking

LOW NOISE FET OPERATIONAL AMPLIFIER

Low noise amplifiers for photodiode, piezoelectric, and other

instrumentation applications typically call for circuit parameters

such as extremely high input impedance, low 1/f noise, or sub-

picoamp bias currents that can be met only with a discrete

amplifier design.

The discrete amplifier shown in Figure 70 uses a high-speed op

amp preceded by a differential amplifier stage. This discrete config-

uration is implemented with dual matched JFETs, which provide

high input impedance and some initial gain, reducing the noise

and precision specifications of the second stage. The low current

consumption of the ADA4807-1/ADA4807-2/ADA4807-4, in

addition to their precision and low noise characteristics, results

in a composite design with 7 mA of total supply current,

1.5 nV/√Hz noise at 1 kHz, and 4 nV/√Hz noise at 10 Hz.

The unbalanced output impedance of the FETs is negated by

the use of an inverting amplifier cascode. The ADA4807-1/

ADA4807-2/ADA4807-4 are ideally suited for the cascode due

to their rail-to-rail input structure, which results in excellent

overload behavior of the overall discrete amplifier. Using this

cascode structure, the CMRR is greater than 100 dB.

A high output impedance current source is also needed to

maintain the CMRR of the discrete amplifier. An ADR510

maintains a precise current over the supply voltage, and the low

collector capacitance of the PMP4201 results in a balanced and

predictable slew rate behavior. This is shown in Figure 71 with a

0.4 V p-p input and a 4 V p-p output with a gain of 10. Figure 72

shows output referred total harmonic distortion plus noise

(THD + N) for a gain of 10.

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