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ADA4807-2ACPZ-R2 数据表(PDF) 29 Page - Analog Devices

部件名 ADA4807-2ACPZ-R2
功能描述  3.1 nV/?숰z, 1 mA, 180 MHz, Rail-to-Rail Input/Output Amplifiers
PDF  33 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4807-2ACPZ-R2 数据表(HTML) 29 Page - Analog Devices

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Data Sheet
ADA4807-1/ADA4807-2/ADA4807-4
Rev. B | Page 29 of 33
ADC DRIVING WITH DYNAMIC POWER SCALING
In power sensitive applications, the ADA4807-1/ADA4807-2
can be switched on prior to the ADC turning on. Figure 78
shows the timing diagram for dynamically power scaling the
ADA4807-1/ADA4807-2 with the AD7982 configuration shown in
Figure 79. The falling edge of the DISABLE signal must align
with the rising edge of the CONV signal of the ADC to obtain a
clean data acquisition. Figure 79 gives the FFT for driving a fully
differential signal chain with a 1.2 µs on time as shown in Figure 78.
With this method, the ADA4807-1/ADA4807-2 quiescent current
(per amplifier) is reduced from 2 mA to 0.25 mA. Figure 81 gives
the FFT for dynamically power scaling a single-ended input
signal chain into a differential ADC with a 4 µs on time as
shown in Figure 80. This configuration results in a quiescent
current reduction of 20%.
CH1 2V
CH2 2V
M1µs
A CH1
2.56V
1
2
CONV
DISABLE
Figure 78. Dynamic Power Scaling Timing Diagram for Driving a Fully
Differential Signal Chain into a Differential ADC (AD7982)
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
20
18
16
14
12
10
8
6
4
2
0
FREQUENCY (kHz)
fs = 200kSPS
fIN = 1kHz
SNR = 96.7dB
THD = –110.9dB
SFDR = –111.8dB
SINAD = 96.6dB
Figure 79. FFT for Driving a Differential Converter using Dynamic Power Scaling,
−0.5 dBFS, On Time of 1.2 µs, for the Schematic Shown in Figure 74
CH1 2V
CH2 2V
M1µs
A CH1
2.56V
1
2
CONV
DISABLE
Figure 80. Dynamic Power Scaling Timing Diagram for Driving a Single-
Ended Input Signal Chain into a Differential ADC (AD7982)
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
20
18
16
14
12
10
8
6
4
2
0
FREQUENCY (kHz)
fs = 200kSPS
fIN = 1kHz
SNR = 94.7dB
THD = –107.11dB
SFDR = –108.8dB
SINAD = 94.4dB
Figure 81. FFT for Driving a Single-Ended to Differential Converter Using
Dynamic Power Scaling, −0.5 dBFS, On Time of 4 µs, for the Schematic Shown in
Figure 76



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