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ADE9078ACPZ 数据表(PDF) 7 Page - Analog Devices |
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ADE9078ACPZ 数据表(HTML) 7 Page - Analog Devices |
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7 / 108 page ![]() ADE9078 Data Sheet Rev. 0 | Page 6 of 107 Parameter Min Typ Max Unit Test Conditions/Comments Channel Drift (PGA, ADC, Internal Voltage Reference) ±7 ±25 ppm/°C PGA = 1, internal VREF ±7 ±25 ppm/°C PGA = 2, internal VREF ±7 ±25 ppm/°C PGA = 4, internal VREF Differential Input Impedance (DC) 330 366 kΩ See the Terminology section, PGA = 1 160 180 kΩ PGA = 2 80 90 kΩ PGA = 4 INTERNAL VOLTAGE REFERENCE Nominal 1.25 V ±1 mV Voltage Reference 1.250 V TA = 25°C, REF pin Temperature Coefficient2 ±5 ±20 ppm/°C TA = −40°C to +85°C EXTERNAL VOLTAGE REFERENCE External Voltage Reference Input Voltage (REF) 1.2, 1.25 V REFGND must be tied to GND, AGND, and DGND; 1.25 V external reference is preferred; the full-scale values mentioned in this data sheet are for a voltage reference of 1.25 V Average Reference Current 120 μA/V CRYSTAL OSCILLATOR CLKIN = 12.288 MHz ± 30 ppm (see the Crystal Oscillator/External Clock section) Input Clock Frequency 12.165 12.288 12.411 MHz Internal Capacitance on CLKIN and CLKOUT 4 pF Internal Feedback Resistance Between CLKIN and CLKOUT 2.5 MΩ Transconductance (gm) 9 mA/V EXTERNAL CLOCK INPUT Input Clock Frequency 12.165 12.288 12.411 MHz Duty Cycle2 45:55 50:50 55:45 % CLKIN Logic Inputs 3.3 V tolerant Input Voltage High, VINH 1.2 V VDD = 2.7 V to 3.63 V Low, VINL 0.5 V VDD = 2.7 V to 3.63 V LOGIC INPUTS PM0, PM1, RESET, MOSI, SCLK, and SS Input Voltage High, VINH 2.4 V VDD = 2.7 V to 3.63 V Low, VINL 0.8 V VDD = 2.7 V to 3.63 V Input Current, IIN 15 μA VIN = 0 V Internal Capacitance, CIN 10 pF LOGIC OUTPUTS MISO, IRQ0, and IRQ1 VDD = 2.97 V to 3.63 V Output Voltage High, VOH 2.4 V ISOURCE = 4 mA Low, VOL 0.8 V ISINK = 4 mA Internal Capacitance, CIN 10 pF CF1, CF2, CF3, and CF4 VDD = 2.97 V to 3.63 V Output Voltage High, VOH 2.4 V ISOURCE = 8 mA Low, VOL 0.8 V ISINK = 8 mA Internal Capacitance, CIN 10 pF |
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