Data Sheet

ADP7182

Rev. I | Page 31 of 31

*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

1.60 BSC

2.80 BSC

1.90

BSC

0.95 BSC

0.20

0.08

0.60

0.45

0.30

8°

4°

0°

0.50

0.30

0.10 MAX

*1.00 MAX

*0.90 MAX

0.70 MIN

2.90 BSC

5

4

1

2

3

SEATING

PLANE

Figure 106. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions shown in millimeters

ORDERING GUIDE

Temperature Range

Package Description

Package Option

Branding

ADP7182ACPZ-R7

−40°C to +125°C

Adjustable

8-Lead LFCSP

CP-8-13

LN6

ADP7182ACPZ-5.0-R7

−40°C to +125°C

−5

8-Lead LFCSP

CP-8-13

LN9

ADP7182AUJZ-R7

−40°C to +125°C

Adjustable

5-Lead TSOT

UJ-5

LN6

ADP7182AUJZ-1.8-R7

−40°C to +125°C

−1.8

5-Lead TSOT

UJ-5

LN1

ADP7182AUJZ-2.5-R7

−40°C to +125°C

−2.5

5-Lead TSOT

UJ-5

LN7

ADP7182AUJZ-3.0-R7

−40°C to +125°C

−3

5-Lead TSOT

UJ-5

LN2

ADP7182AUJZ-5.0-R7

−40°C to +125°C

−5

5-Lead TSOT

UJ-5

LN9

ADP7182ACPZN-R7

−40°C to +125°C

Adjustable

6-Lead LFCSP

CP-6-3

LN6

ADP7182ACPZN-5.0R7

−40°C to +125°C

−5

6-Lead LFCSP

CP-6-3

LN9

ADP7182ACPZN-2.5R7

−40°C to +125°C

−2.5

6-Lead LFCSP

CP-6-3

LN7

ADP7182ACPZN-1.5R7

−40°C to +125°C

−1.5

6-Lead LFCSP

CP-6-3

LQK

ADP7182ACPZN-1.2R7

−40°C to +125°C

−1.2

6-Lead LFCSP

CP-6-3

LRE

ADP7182UJ-EVALZ

Evaluation Board, TSOT

ADP7182CP-EVALZ

Evaluation Board, LFCSP

1

Z = RoHS Compliant Part.

2

For additional voltage options, contact a local Analog Devices, Inc., sales or distribution representative.

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registered trademarks are the property of their respective owners.

D10703-0-12/16(I)