ZSC31015EEG1-R datasheet(17/52 Pages) IDT

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November 14, 2016

ZSC31015 Datasheet

)

Offset

Raw

(

Gain





Corrected Temperature Reading:

(5)

Where:

T_Raw

Raw Temperature reading converted from PTAT signal or external diode

Offset_T =

Offset Coefficient for Temperature

Gain_T

Gain Coefficient for Temperature

2.3.1.

EEPROM

The EEPROM contains the calibration coefficients for gain and offset, etc., and the configuration bits, such as

output mode, update rate, etc. The ZSC31015 also offers three user-programmable storage bytes for module

traceability. When programming the EEPROM, an internal charge pump voltage is used; therefore a high voltage

supply is not needed. The EEPROM is implemented as a shift register. During an EEPROM read, the contents

are shifted 8 bits before each transmission of one byte occurs. The charge pump is internally regulated to 12.5 V,

and the programming time is 6ms.

See section 2.6.1 regarding EEPROM signatures for verifying EEPROM integrity.

Note: EEPROM writing can only be performed at temperatures lower than 85ºC.

2.3.2.

One-Wire Interface

– ZACwire™

The IC communicates via a one-wire serial interface. There are different commands available for the following:



Reading the conversion result of the ADC (Get_BR_Raw, Get_T_Raw)



Calibration commands



Reading from the EEPROM (

“dump” of entire contents)



Writing to the EEPROM (trim setting, configuration, and coefficients)

2.4.

Output Stage

2.4.1.

Digital to Analog Converter (Output DAC) with Programmable Clipping Limits

A 12-bit DAC based on sub-ranging resistor strings is used for the digital-to-analog output conversion in the

analog ratiometric and absolute analog voltage modes. Options during calibration configure the system to operate

in either of these modes. The design allows for excellent testability as well as low power consumption. The DAC

allows programming a lower and upper clipping limit (Low_Clip_Lim and Up_Clip_Lim bit fields respectively; see

section 3.5) for the output signal (analog and digital). The internal 14-bit calculated bridge value is compared

against

the

14-bit

value

formed

{11,Up_Clip_Lim[6:0],11111}

for

the

upper

limit

and

against

{00,Low_Clip_Lim[6:0],00000} for the lower limit. If the calculated bridge value is higher than the upper limit or

less than the lower limit, the analog output value is clipped to this value; otherwise it is output as is.

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