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L9950 数据表(PDF) 12 Page - STMicroelectronics |
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L9950 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 23 page  L9950 12/23 Table 8. LS1 HS1 LS2 HS2 LS3 HS3 DO LS3 HS3 LS4 HS4 LS5 HS5 Test Pad ! (both HI) ! (both HI) ! (both HI) NoError ! (both HI) ! (both HI) ! (both HI) 5 µA Iref both HI ! (both HI) ! (both HI) DI both HI ! (both HI) ! (both HI) Tsens1 ! (both HI) both HI ! (both HI) CLK ! (both HI) both HI ! (both HI) Tsens2 both HI both HI ! (both HI) INT_CLK both HI both HI ! (both HI) Tsens3 ! (both HI) ! (both HI) both HI PWM1 ! (both HI) ! (both HI) both HI Tsens4 both HI ! (both HI) both HI PWM2 both HI ! (both HI) both HI Tsens5 ! (both HI) both HI both HI Tsens6 both HI both HI both HI Vbandgap Table 9. SPI - Input Data and Status Register Bit Input Register 0 (write) Status Register 0 (read) Name Comment Name Comment 23 Enable Bit If Enable Bit is set the device will be switched in active mode. If Enable Bit is cleared device go into standby mode and all bits are cleared. After power-on reset device starts in standby mode. Always 1 A broken VCC-or SPI-connection of the L9950 can be detected by the microcontroller, because all 24 bits low or high is not a valid frame. 22 Reset Bit If Reset Bit is set both status registers will be cleared after rising edge of CSN input. VS overvoltage In case of an overvoltage or undervoltage event the corresponding bit is set and the outputs are deactivated. If VS voltage recovers to normal operating conditions outputs are reactivated automatically (if Bit 20 of status register 0 is not set). 21 OC Recovery Duty Cycle This bit defines in combination with the over-current recovery bit (Input Register 1) the duty cycle in over-current condition of an activated driver. VS undervoltage 0: 12% 1: 25% 20 Overvoltage/ Under-voltage recovery disable If this bit is set the microcontroller has to clear the status register after undervoltage/overvoltage event to enable the outputs. Thermal shutdown In case of an thermal shutdown all outputs are switched off. The microcontroller has to clear the TSD bit by setting the Reset Bit to reactivate the outputs. 19 Depending on combination of bit 18 and 19 the current image (1/10.000) of the selected HS-output will be multi-plexed to the CM output: Temperature warning This bit is for information purpose only. It can be used for a thermal management by the microcontroller to avoid a thermal shutdown. 18 Current Monitor Select Bits Bit 19 Bit 18 Output Not Ready Bit After switching the device from standby mode to active mode an internal timer is started to allow chargepump to settle before the outputs can be activated. This bit is cleared automatically after start up time has finished. Since this bit is controlled by internal clock it can be used for synchonizing testing events (e.g. measuring filter times). 00OUT11 10OUT1/OUT6 01OUT5 11OUT4 HS-driver of OUT1 is only selected if HS-driver OUT1 is switched on and HS-driver OUT6 is not activated. |
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