L9950 datasheet(13/23 Pages) STMICROELECTRONICS

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L9950

Table 9. SPI - Input Data and Status Register (continued)

Bit

Input Register 0 (write)

Status Register 0 (read)

Name

Comment

Name

Comment

OUT11 – HS on/off

If a bit is set the selected

output driver is switched on. If

the corresponding PWM

enable bit is set (Input Register

1) the driver is only activated if

PWM1 (PWM2) input signal is

high. The outputs of OUT1-

OUT6 are half bridges. If the

bits of HS- and LS-driver of the

same half bridge are set, the

internal logic prevents that both

drivers of this output stage can

be switched on simultaneously

in order to avoid a high internal

current from VS to GND. In test

mode (CSN>7.5V) this bit

combinations are used to

multiplex internal signals to the

DO-output.

OUT11 – HS over-

current

In case of an over-current event the

corresponding status bit is set and

the output driver is disabled. If the

over-current Recovery Enable bit is

set (Input Register 1) the output will

be automatically reactivated after a

delay time resulting in a PWM

modulated current with a

programmable duty cycle (Bit 21).

If the over-current recovery bit is not

set the microcontroller has to clear

the over-current bit (Reset Bit) to

reactivate the output driver.

OUT10 – HS on/off

OUT10 – HS over-

current

OUT9 – HS on/off

OUT9 – HS over-

current

OUT8 – HS on/off

OUT8 – HS over-

current

OUT7 – HS on/off

OUT7 – HS over-

current

OUT6 – HS on/off

OUT6 – HS over-

current

OUT6 – LS on/off

OUT6 – LS over-

current

OUT5 – HS on/off

OUT5 – HS over-

current

OUT5 – LS on/off

OUT5 – LS over-

current

OUT4 – HS on/off

OUT4 – HS over-

current

OUT4 – LS on/off

OUT4 – LS over-

current

OUT3 – HS on/off

OUT3 – HS over-

current

OUT3 – LS on/off

OUT3 – LS over-

current

OUT2 – HS on/off

OUT2 – HS over-

current

OUT2 – LS on/off

OUT2 – LS over-

current

OUT1 – HS on/off

OUT1 – HS over-

current

OUT1 – LS on/off

OUT1 – LS over-

current

No error Bit

A logical NOR-combination of all

bits 1 to 22 in both status registers.

Bit

Input Register 1 (write)

Status Register 1 (read)

Name

Comment

Name

Comment

Enable Bit

If Enable Bit is set the device will be

switched in active mode. If Enable

Bit is cleared device go into standby

mode and all bits are cleared. After

power-on reset device starts in

standby mode.

Always 1

A broken VCC-or SPI-

connection of the L9950 can

be detected by the

microcontroller, because all

24 bits low or high is not a

valid frame.

Table 9. SPI - Input Data and Status Register (continued)

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