ADL5506

Data Sheet

Rev. A | Page 8 of 23

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

CFLT

Connection for an External Capacitor, CFLT, to Reduce the Modulation Content from the Output Voltage. It also

slows the response of the output and reduces the noise seen on the output. The capacitor is connected between

CFLT and VLOG. See the Filter Capacitor section for choosing the correct CFLT value.

2

VPOS

pin on the printed circuit board.

3

RFIN

RF Input. 5 pF ac coupling capacitor on chip. Connect a 52.3 Ω shunt resistor near this pin for broadband 50 Ω

match. See the Input Coupling Options section for more matching options.

4

COMM

Device Common (Ground). Connect this pin to system ground using a low impedance path.

5

VLOG

proportional to the logarithm of the input signal level.

6

ENBL

logic low (0 V to 0.5 V) to disable the device.

1

CFLT

6

ENBL

2

VPOS

5

VLOG

3

RFIN

4

COMM

ADL5506

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