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ADL5506ACBZ-R7 数据表(PDF) 19 Page - Analog Devices |
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ADL5506ACBZ-R7 数据表(HTML) 19 Page - Analog Devices |
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19 / 24 page ![]() ADL5506 Data Sheet Rev. A | Page 18 of 23 LOG CONFORMANCE ERROR CALCULATION Log conformance error is expressed in terms of the deviation in the output voltage between the measured VLOG and the VLOG calculated with an ideal log transformation function. Ideally, the measured VLOG output at a particular input power, as plotted in Figure 44, must not deviate from the calculated value of VLOG at that same input power. Setting the measured VLOG to the right side of the preceding equation and rearranging yields 0 ) ( O IN SLOPE IN MEASURED LOG P P V P V In actuality, this does not always calculate to zero. The finite calculation that results is the log conformance error, as follows: 0 ) ( ) ( O IN SLOPE IN MEASURED LOG IN P P V P V P Error where Error is in dB. When more than two calibration points are chosen to compute the error, the error computation must be done in a piece-wise fashion. For the ADL5506, three calibration points were chosen in characterization to compute the log conformance error of the ADL5506. For example, one set of calibration points used was −40 dBm, −30 dBm, and −10 dBm. With three calibration points, two regions of error are computed, Region A and Region B (see Figure 45) To compute the error, first compute two slopes and two intercepts: one slope and intercept for Region A and the other slope and intercept for Region B. Note that the error is zero at each calibration point. IN1 IN2 LOG1 LOG2 A SLOPE P P V V V _ IN2 IN3 LOG2 LOG3 B SLOPE P P V V V _ Next, find the two intercepts. (The two intercept points can be computed with the same calibration points, middle point for both, with the slope being different for the two intercept points.) IN2 A SLOPE LOG A O P V V P _ 2 _ 3 _ 3 _ IN B SLOPE LOG B O P V V P Figure 44. VLOG vs. PIN The log conformance error for Region A, which is from the low end of the input power range to PIN2 is as follows: A O IN A SLOPE IN LOG IN A P P V P V P Error _ _ ) ( ) ( The log conformance error for Region B, which is from PIN2 to the upper end of the input power range is as follows: B O IN B SLOPE IN LOG IN B P P V P V P Error _ _ ) ( ) ( Figure 45. Error vs. PIN For four calibration points, there are three regions of error computed. Filter Capacitor The video bandwidth of VLOG is approximately 3.5 MHz. In CW applications where the input frequency is much higher than this, no further filtering of the demodulated signal is required. Where there is a low frequency modulation of the carrier amplitude, however, reduce the low-pass corner by the addition of an external filter capacitor, CFLT. The video bandwidth is related to CFLT by F C Bandwidth Video pF 5 . 3 k Ω 13 2 1 (PIN1, VLOG1) 0 0.2 0.4 0.6 0.8 1.0 1.2 –50 –45 –40 –35 –30 –25 –20 –15 –10 –50 5 PIN (dBm) VLOG VLOG CALCULATED (PIN2, VLOG2) (PIN3, VLOG3) –3 –2 –1 0 1 2 3 –50 –45 –40 –35 –30 –25 –20 –15 –10 –50 5 PIN (dBm) REGION B REGION A |
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