Digital interfaces

L2G2IS

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DocID027248 Rev 2

5.1.1

SPI read

Figure 5. SPI read protocol

The SPI read command is performed with 16 clock pulses:

bit 0: READ bit. The value is 1.

bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in

multiple reads.

bit 2-7: address AD(5:0). This is the address field of the indexed register.

bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb

first).

A multiple read command is also available.

5.1.2

SPI write

Figure 6. SPI write protocol

The SPI write command is performed with 16 clock pulses. A multiple byte write command

is performed by adding blocks of 8 clock pulses to the previous one.

bit 0: WRITE bit. The value is 0.

bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in

multiple writes.

bit 2 -7: address AD(5:0). This is the address field of the indexed register.

bit 8-15: data DI(7:0) (write mode). This is the data that will be written inside the device

(MSb first).

bit 16-... : data DI(...-8). Further data in multiple byte writes.