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LSM330D 数据表(PDF) 16 Page - STMicroelectronics

部件名 LSM330D
功能描述  Low power mode
PDF  66 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM330D 数据表(HTML) 16 Page - STMicroelectronics

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Module specifications
LSM330D
16/66
Doc ID 022562 Rev 2
Figure 3.
SPI slave timing diagram(c)(d)
3.
Data on CS, SPC, SDI and SDO refer to pins: CS_A, CS_G, SCL_A/G, SDA_A/G, SDO_A / SDO_G.
2.4.2
I2C - inter IC control interface
Subject to general operating conditions for Vdd and TOP.
c.
The SDO_A output line features an internal pull-up.
d.
Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.
SPC
CS
SDI
SDO
tsu(CS)
tv(SO)
th(SO)
th(SI)
tsu(SI)
th(CS)
tdis(SO)
tc(SPC)
MSB IN
MSB OUT
LSB OUT
LSB IN
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
Table 7.
I2C slave timing values
Symbol
Parameter(1)
I2C standard mode (1)
I2C fast mode (1)
Unit
Min
Max
Min
Max
f(SCL)
SCL clock frequency
0
100
0
400
KHz
tw(SCLL)
SCL clock low time
4.7
1.3
µs
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
ns
th(SDA)
SDA data hold time
0
3.45
0
0.9
µs
tr(SDA) tr(SCL)
SDA and SCL rise time
1000
20 + 0.1Cb
(2)
300
ns
tf(SDA) tf(SCL)
SDA and SCL fall time
300
20 + 0.1Cb
(2)
300
th(ST)
START condition hold time
4
0.6
µs
tsu(SR)
Repeated START condition
setup time
4.7
0.6
tsu(SP)
STOP condition setup time
4
0.6
tw(SP:SR)
Bus free time between STOP
and START condition
4.7
1.3
1.
SCL (SCL_A/G pin), SDA (SDA_A/G pin)
2.
Cb = total capacitance of one bus line, in pF



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