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LSM330D 数据表(PDF) 44 Page - STMicroelectronics

部件名 LSM330D
功能描述  Low power mode
PDF  66 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM330D 数据表(HTML) 44 Page - STMicroelectronics

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Register descriptions
LSM330D
44/66
Doc ID 022562 Rev 2
8.4
CTRL_REG4_A (23h)
8.5
CTRL_REG5_A (24h)
I1_DRDY1
DRDY1 interrupt on INT1_A. Default value 0.
(0: Disable; 1: Enable)
I1_DRDY2
DRDY2 interrupt on INT1_A. Default value 0.
(0: Disable; 1: Enable)
I1_WTM
FIFO watermark interrupt on INT1_A. Default value 0.
(0: Disable; 1: Enable)
I1_OVERRUN
FIFO Overrun interrupt on INT1_A. Default value 0.
(0: Disable; 1: Enable)
Table 26.
CTRL_REG3_A description (continued)
Table 27.
CTRL_REG4_A register
0(1)
1.
This bit must be set to ‘0’ for correct operation.
BLE
FS1
FS0
HR
0(1)
0(1)
SIM
Table 28.
CTRL_REG4_A description
BLE
Big/little endian data selection. Default value 0.
(0: Data LSb @ lower address; 1: Data MSb @ lower address)
FS1-FS0
Full Scale selection. default value: 00
(00: +/- 2G; 01: +/- 4G; 10: +/- 8G; 11: +/- 16G)
HR
High resolution output mode: Default value: 0
(0: High resolution disable; 1: High resolution enable)
SIM
SPI serial interface mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface).
Table 29.
CTRL_REG5_A register
BOOT
FIFO_EN
--
--
LIR_INT1
D4D_INT1
0(1)
1.
This bit must be set to ‘0’ for correct operation.
0(1)
Table 30.
CTRL_REG5_A description
BOOT
Reboot memory content. Default value: 0
(0: Normal mode; 1: reboot memory content)
FIFO_EN
FIFO enable. Default value: 0
(0: FIFO disable; 1: FIFO Enable)



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