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L9301 数据表(PDF) 11 Page - STMicroelectronics |
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L9301 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 51 page ![]() DocID028688 Rev 6 11/51 L9301 Supply pins 50 4 Supply pins 4.1 VDD An external +5.0 ±0.25 VDC supply provided from an external source is the primary power source to the L9301. This supply is used as the power source for all of its internal logic circuitry and other miscellaneous functions. The VDD is monitored for under and over voltage and a dedicated SPI flag of each event is set to report those conditions. The device behavior in case of VDD fault detection can be defined using the proper configuration bit that allows to choose if the OUT must be disabled or not. 4.2 VB This input is the supply for the on board charge pump and it shall be connected to protected battery line. In case of high-side configuration, to get the specified Ron value this pin must be connected to the same VB where the loads are connected. If it is present an additional voltage drop between the two VB, the Rdson of that given output will be higher than the specified maximum. The VB is monitored for under and over voltage and a dedicated SPI flag of each event is set to report those conditions. The device behavior in case of VB fault detection can be defined using the proper configuration bit that allows to choose if the OUT must be disabled or not. Table 8. VDD Pin Symbol Parameter Test condition Min. Typ. Max. Unit VDD VDD_UV VDD undervoltage detection threshold VDD decreasing 4.5 - 4.7 V VDD_uv_filt VDD undervoltage filter time for output disable Tested by scan 90 - 145 μs VDD_OV VDD overvoltage detection threshold VDD increasing 5.25 - 5.5 V VDD_ov_filt VDD overvoltage filter time for output disable Tested by scan 90 - 145 μs |
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