PC87570 datasheet(48/168 Pages) NSC

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Host Bus Interface (HBI)

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5.0

Host Bus Interface (HBI)

The HBI facilitates the various data transfers required be-

tween the different modules of the system. It also arbitrates

between host and CompactRISC CR16A accesses to

shared resources: the memory device and the RTC/APC.

Figure 5-1 shows a schematic diagram of the possible bus-

to-bus bridging options.

The host bus is an 8-bit wide ISA-compatible bus. The

PC87570 is accessed from the host bus as:

a memory device when using the HMEMR, HMEMW

and HMEMCS signals, (to interface the external mem-

ory device, BIOS Flash).

an I/O device when using the HIOW, HIOR and HAEN

signals, (to interface on-chip resident I/O devices)

The HBI allows the host and CR16A core to share the same

Flash memory. In this way, only one memory device is

needed for both the host system BIOS, and for the

PC87570 code. Memories other than Flash may be used.

Both the host and the CR16A can access the three legacy

I/O devices:

The KBC, used for keyboard control, mouse and an

auxiliary pointing device, at default host addresses

0060h and 0064h

The Power Management (PM) device, at default host

addresses 0062h and 0066h

The RTC and APC (referred to in this chapter as the

RTC/APC), at default host addresses 0070h and 0071h.

Data transfers to/from host or CR16A core can be imple-

mented using polling or interrupt driven schemes. This en-

hances system performance and flexibility. The on-chip

hardware is designed to allow a race-free interface for both

these access paths.

5.1

FEATURES

Memory device sharing between the host (BIOS) and

the PC87570 ﬁrmware, for both read and write

Direct support for an 8-bit ISA bus (host)

PnP support

— Host Device Enable (HDEN) strap input pin selects

if the modules are disabled (default) or enabled after

reset; software programmable enable/disable bits

for each module

— First enable using PnP escape sequence

— Relocatable chip-conﬁguration-base-address

(Index/Data registers)

— Default legacy addresses for each module, relocat-

able by software

— Conﬁguration lock bits for the chip-conﬁguration-

base-address and for each module

— programmable IRQ polarity and output buffer type

Three Host Interface channels, typically used for KBC,

PM, and RTC/APC, as follows:

— KBC

— 8042-compatible KBC standard interface

— Intel 8051SL compatible host interface

— Standard IRQ1 (keyboard) and IRQ12 (mouse)

may be operated by either hardware or ﬁrmware

— Fast gate A20 and fast reset via ﬁrmware

— Reset signal to the host on dedicated HRSTO

pin; both hardware and software control

— PM, (Power Management channel); interrupt IRQ11

— RTC/APC, accessible from both the host and

CR16A

HIOR

HMEMW

Host Bus

Resident

Core Bus

HIOW

CR16A Access

Host

Host Access to

Peripherals

Figure 5-1. Host Bus Interface Schematic Diagram

Device

Core Bus to

ISA Bus

Bridge

Core and

Host

Arbitrator

to RTC

Access

Shared

Memory

PC87570

CR16A CORE

Host Interface

HAEN

Bus

HMEMR

HMEMCS

BIU

External

Memory

(Flash)

ROM

PC87570 数据表(PDF) 48 Page - National Semiconductor (TI)

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